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Commit c73b046f authored by Yue Hin Lau's avatar Yue Hin Lau Committed by Alex Deucher
Browse files

drm/amd/display: Expose some mem_input functions for reuse 



Signed-off-by: default avatarYue Hin Lau <Yuehin.Lau@amd.com>
Reviewed-by: default avatarTony Cheng <Tony.Cheng@amd.com>
Acked-by: default avatarHarry Wentland <Harry.Wentland@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent ed23cba2

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h

+0 −1
Original line number Diff line number Diff line
@@ -113,7 +113,6 @@ 
	SRI(FORMAT_CONTROL, CNVC_CFG, id), \

	SRI(CNVC_SURFACE_PIXEL_FORMAT, CNVC_CFG, id), \

	SRI(CURSOR0_CONTROL, CNVC_CUR, id), \

	SRI(CURSOR0_CONTROL, CNVC_CUR, id), \

	SRI(CURSOR0_COLOR0, CNVC_CUR, id), \

	SRI(CURSOR0_COLOR1, CNVC_CUR, id)

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mem_input.c

+13 −13
Original line number Diff line number Diff line
@@ -38,7 +38,7 @@ 
#define FN(reg_name, field_name) \

	mi->mi_shift->field_name, mi->mi_mask->field_name



static void min10_set_blank(struct mem_input *mem_input, bool blank)

void min10_set_blank(struct mem_input *mem_input, bool blank)

{

	struct dcn10_mem_input *mi = TO_DCN10_MEM_INPUT(mem_input);

	uint32_t blank_en = blank ? 1 : 0;
@@ -87,7 +87,7 @@ static void min10_vready_workaround(struct mem_input *mem_input, 
	REG_WRITE(HUBPREQ_DEBUG_DB, value);

}



static void min10_program_tiling(

void min10_program_tiling(

	struct dcn10_mem_input *mi,

	const union dc_tiling_info *info,

	const enum surface_pixel_format pixel_format)
@@ -107,7 +107,7 @@ static void min10_program_tiling( 
			PIPE_ALIGNED, info->gfx9.pipe_aligned);

}



static void min10_program_size_and_rotation(

void min10_program_size_and_rotation(

	struct dcn10_mem_input *mi,

	enum dc_rotation_angle rotation,

	enum surface_pixel_format format,
@@ -169,7 +169,7 @@ static void min10_program_size_and_rotation( 
				H_MIRROR_EN, mirror);

}



static void min10_program_pixel_format(

void min10_program_pixel_format(

	struct dcn10_mem_input *mi,

	enum surface_pixel_format format)

{
@@ -245,7 +245,7 @@ static void min10_program_pixel_format( 
	/* don't see the need of program the xbar in DCN 1.0 */

}



static bool min10_program_surface_flip_and_addr(

bool min10_program_surface_flip_and_addr(

	struct mem_input *mem_input,

	const struct dc_plane_address *address,

	bool flip_immediate)
@@ -395,7 +395,7 @@ static bool min10_program_surface_flip_and_addr( 
	return true;

}



static void min10_dcc_control(struct mem_input *mem_input, bool enable,

void min10_dcc_control(struct mem_input *mem_input, bool enable,

		bool independent_64b_blks)

{

	uint32_t dcc_en = enable ? 1 : 0;
@@ -425,7 +425,7 @@ static void min10_program_surface_config( 
	min10_program_pixel_format(mi, format);

}



static void min10_program_requestor(

void min10_program_requestor(

		struct mem_input *mem_input,

		struct _vcs_dpi_display_rq_regs_st *rq_regs)

{
@@ -459,7 +459,7 @@ static void min10_program_requestor( 
}





static void min10_program_deadline(

void min10_program_deadline(

		struct mem_input *mem_input,

		struct _vcs_dpi_display_dlg_regs_st *dlg_attr,

		struct _vcs_dpi_display_ttu_regs_st *ttu_attr)
@@ -595,7 +595,7 @@ static void min10_setup( 
	min10_vready_workaround(mem_input, pipe_dest);

}



static void min10_program_display_marks(

void min10_program_display_marks(

	struct mem_input *mem_input,

	struct dce_watermarks nbp,

	struct dce_watermarks stutter,
@@ -607,7 +607,7 @@ static void min10_program_display_marks( 
	 */

}



static bool min10_is_flip_pending(struct mem_input *mem_input)

bool min10_is_flip_pending(struct mem_input *mem_input)

{

	uint32_t flip_pending = 0;

	struct dcn10_mem_input *mi = TO_DCN10_MEM_INPUT(mem_input);
@@ -696,7 +696,7 @@ static void min10_set_vm_context0_settings(struct mem_input *mem_input, 
			SYSTEM_ACCESS_MODE, 3);

}



static void min_set_viewport(

void min_set_viewport(

	struct mem_input *mem_input,

	const struct rect *viewport,

	const struct rect *viewport_c)
@@ -845,7 +845,7 @@ static enum cursor_lines_per_chunk ippn10_get_lines_per_chunk( 
	return line_per_chunk;

}



static void ippn10_cursor_set_attributes(

void ippn10_cursor_set_attributes(

		struct mem_input *mem_input,

		const struct dc_cursor_attributes *attr)

{
@@ -873,7 +873,7 @@ static void ippn10_cursor_set_attributes( 
			attr->color_format);

}



static void ippn10_cursor_set_position(

void ippn10_cursor_set_position(

		struct mem_input *mem_input,

		const struct dc_cursor_position *pos,

		const struct dc_cursor_mi_param *param)

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mem_input.h

+60 −0
Original line number Diff line number Diff line
@@ -589,6 +589,65 @@ struct dcn10_mem_input { 
	const struct dcn_mi_mask *mi_mask;

};



void min10_program_deadline(

		struct mem_input *mem_input,

		struct _vcs_dpi_display_dlg_regs_st *dlg_attr,

		struct _vcs_dpi_display_ttu_regs_st *ttu_attr);



void min10_program_requestor(

		struct mem_input *mem_input,

		struct _vcs_dpi_display_rq_regs_st *rq_regs);



void min10_program_pixel_format(

	struct dcn10_mem_input *mi,

	enum surface_pixel_format format);



void min10_program_size_and_rotation(

	struct dcn10_mem_input *mi,

	enum dc_rotation_angle rotation,

	enum surface_pixel_format format,

	const union plane_size *plane_size,

	struct dc_plane_dcc_param *dcc,

	bool horizontal_mirror);



void min10_program_tiling(

	struct dcn10_mem_input *mi,

	const union dc_tiling_info *info,

	const enum surface_pixel_format pixel_format);



void min10_dcc_control(struct mem_input *mem_input,

		bool enable,

		bool independent_64b_blks);



void min10_program_display_marks(

	struct mem_input *mem_input,

	struct dce_watermarks nbp,

	struct dce_watermarks stutter,

	struct dce_watermarks urgent,

	uint32_t total_dest_line_time_ns);



bool min10_program_surface_flip_and_addr(

	struct mem_input *mem_input,

	const struct dc_plane_address *address,

	bool flip_immediate);



bool min10_is_flip_pending(struct mem_input *mem_input);



void ippn10_cursor_set_attributes(

		struct mem_input *mem_input,

		const struct dc_cursor_attributes *attr);



void ippn10_cursor_set_position(

		struct mem_input *mem_input,

		const struct dc_cursor_position *pos,

		const struct dc_cursor_mi_param *param);



void min10_set_blank(struct mem_input *mem_input, bool blank);



void min_set_viewport(struct mem_input *mem_input,

		const struct rect *viewport,

		const struct rect *viewport_c);



void dcn10_mem_input_construct(

	struct dcn10_mem_input *mi,

	struct dc_context *ctx,
@@ -597,6 +656,7 @@ void dcn10_mem_input_construct( 
	const struct dcn_mi_shift *mi_shift,

	const struct dcn_mi_mask *mi_mask);





struct dcn_hubp_state {

	uint32_t pixel_format;

	uint32_t inuse_addr_hi;