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Commit c5d0188b authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
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Merge "msm: kgsl: Add a check for A650 while initializing LLCC"

parents 4c788db5 90c8a1e1

drivers/gpu/msm/adreno.h

+8 −0
Original line number Diff line number Diff line
@@ -1326,6 +1326,14 @@ static inline int adreno_is_a615_family(struct adreno_device *adreno_dev) 
			rev == ADRENO_REV_A618);

}



static inline int adreno_is_a640_family(struct adreno_device *adreno_dev)

{

	unsigned int rev = ADRENO_GPUREV(adreno_dev);



	return (rev == ADRENO_REV_A640 || rev == ADRENO_REV_A650 ||

			rev == ADRENO_REV_A680);

}



static inline int adreno_is_a630v1(struct adreno_device *adreno_dev)

{

	return (ADRENO_GPUREV(adreno_dev) == ADRENO_REV_A630) &&

drivers/gpu/msm/adreno_a6xx.c

+1 −1
Original line number Diff line number Diff line
@@ -1704,7 +1704,7 @@ static void a6xx_llc_configure_gpu_scid(struct adreno_device *adreno_dev) 
		gpu_cntl1_val = (gpu_cntl1_val << A6XX_GPU_LLC_SCID_NUM_BITS)

			| gpu_scid;



	if (adreno_is_a640(adreno_dev) || adreno_is_a612(adreno_dev)) {

	if (adreno_is_a640_family(adreno_dev) || adreno_is_a612(adreno_dev)) {

		kgsl_regrmw(KGSL_DEVICE(adreno_dev), A6XX_GBIF_SCACHE_CNTL1,

			A6XX_GPU_LLC_SCID_MASK, gpu_cntl1_val);

	} else {