Loading drivers/media/platform/msm/npu/npu_mgr.c +12 −10 Original line number Diff line number Diff line Loading @@ -25,9 +25,6 @@ #define LOG_MSG_TOTAL_SIZE_INDEX 0 #define LOG_MSG_MSG_ID_INDEX 1 #define NPU_FW_TIMEOUT_POLL_INTERVAL_MS 10 #define NPU_FW_TIMEOUT_MS 5000 /* ------------------------------------------------------------------------- * File Scope Function Prototypes * ------------------------------------------------------------------------- Loading @@ -39,7 +36,8 @@ static void npu_disable_fw_work(struct work_struct *work); static void npu_update_pwr_work(struct work_struct *work); static void turn_off_fw_logging(struct npu_device *npu_dev); static int wait_for_status_ready(struct npu_device *npu_dev, uint32_t status_reg, uint32_t status_bits, bool poll); uint32_t status_reg, uint32_t status_bits, uint32_t timeout_ms, bool poll); static int wait_npu_cpc_power_off(struct npu_device *npu_dev); static struct npu_network *alloc_network(struct npu_host_ctx *ctx, struct npu_client *client); Loading Loading @@ -99,7 +97,7 @@ static int wait_npu_cpc_power_off(struct npu_device *npu_dev) uint32_t wait_cnt = 0, max_wait_ms; struct npu_host_ctx *host_ctx = &npu_dev->host_ctx; max_wait_ms = NPU_FW_TIMEOUT_MS; max_wait_ms = NPU_FW_ACK_TIMEOUT_MS; do { reg_val = npu_tcsr_reg_read(npu_dev, TCSR_NPU_CPC_PWR_ON); Loading Loading @@ -155,7 +153,8 @@ static int load_fw_nolock(struct npu_device *npu_dev, bool enable) /* Keep reading ctrl status until NPU is ready */ ret = wait_for_status_ready(npu_dev, REG_NPU_FW_CTRL_STATUS, FW_CTRL_STATUS_MAIN_THREAD_READY_VAL, false); FW_CTRL_STATUS_MAIN_THREAD_READY_VAL, NPU_FW_BRINGUP_TIMEOUT_MS, false); if (ret) goto load_fw_fail; Loading Loading @@ -521,7 +520,8 @@ static int npu_notify_fw_pwr_state(struct npu_device *npu_dev, NPU_ERR("NPU_IPC_CMD_NOTIFY_PWR sent failed: %d\n", ret); } else { ret = wait_for_status_ready(npu_dev, REG_NPU_FW_CTRL_STATUS, FW_CTRL_STATUS_PWR_NOTIFY_DONE_VAL, true); FW_CTRL_STATUS_PWR_NOTIFY_DONE_VAL, NPU_FW_ACK_TIMEOUT_MS, true); if (!ret) { reg_val = REGR(npu_dev, REG_NPU_FW_CTRL_STATUS); if (reg_val & FW_CTRL_STATUS_PWR_NOTIFY_ERR_VAL) { Loading Loading @@ -917,7 +917,8 @@ static int host_error_hdlr(struct npu_device *npu_dev, bool force) /* Keep reading ctrl status until NPU is ready */ ret = wait_for_status_ready(npu_dev, REG_NPU_FW_CTRL_STATUS, FW_CTRL_STATUS_MAIN_THREAD_READY_VAL, false); FW_CTRL_STATUS_MAIN_THREAD_READY_VAL, NPU_FW_BRINGUP_TIMEOUT_MS, false); if (ret) { NPU_ERR("wait for fw status ready timedout\n"); goto fw_start_done; Loading Loading @@ -1163,14 +1164,15 @@ static void turn_off_fw_logging(struct npu_device *npu_dev) } static int wait_for_status_ready(struct npu_device *npu_dev, uint32_t status_reg, uint32_t status_bits, bool poll) uint32_t status_reg, uint32_t status_bits, uint32_t timeout_ms, bool poll) { uint32_t ctrl_sts = 0; uint32_t wait_cnt = 0, max_wait_ms; struct npu_host_ctx *host_ctx = &npu_dev->host_ctx; max_wait_ms = (host_ctx->fw_dbg_mode & FW_DBG_MODE_INC_TIMEOUT) ? NW_DEBUG_TIMEOUT_MS : NPU_FW_TIMEOUT_MS; NW_DEBUG_TIMEOUT_MS : timeout_ms; if (poll) wait_cnt = max_wait_ms * 10; else Loading drivers/media/platform/msm/npu/npu_mgr.h +4 −1 Original line number Diff line number Diff line /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved. * Copyright (c) 2017-2020, The Linux Foundation. All rights reserved. */ #ifndef _NPU_MGR_H Loading Loading @@ -28,6 +28,9 @@ #define NW_DEBUG_TIMEOUT msecs_to_jiffies(NW_DEBUG_TIMEOUT_MS) #define NPU_MBOX_IDLE_TIMEOUT_MS 500 /* set for 500ms */ #define NPU_MBOX_IDLE_TIMEOUT msecs_to_jiffies(NPU_MBOX_IDLE_TIMEOUT_MS) #define NPU_FW_TIMEOUT_POLL_INTERVAL_MS 10 #define NPU_FW_ACK_TIMEOUT_MS 5000 #define NPU_FW_BRINGUP_TIMEOUT_MS (1000 * 60) /* set for 60 seconds */ #define FIRMWARE_VERSION 0x00001000 #define MAX_LOADED_NETWORK 32 #define NPU_IPC_BUF_LENGTH 4096 Loading Loading
drivers/media/platform/msm/npu/npu_mgr.c +12 −10 Original line number Diff line number Diff line Loading @@ -25,9 +25,6 @@ #define LOG_MSG_TOTAL_SIZE_INDEX 0 #define LOG_MSG_MSG_ID_INDEX 1 #define NPU_FW_TIMEOUT_POLL_INTERVAL_MS 10 #define NPU_FW_TIMEOUT_MS 5000 /* ------------------------------------------------------------------------- * File Scope Function Prototypes * ------------------------------------------------------------------------- Loading @@ -39,7 +36,8 @@ static void npu_disable_fw_work(struct work_struct *work); static void npu_update_pwr_work(struct work_struct *work); static void turn_off_fw_logging(struct npu_device *npu_dev); static int wait_for_status_ready(struct npu_device *npu_dev, uint32_t status_reg, uint32_t status_bits, bool poll); uint32_t status_reg, uint32_t status_bits, uint32_t timeout_ms, bool poll); static int wait_npu_cpc_power_off(struct npu_device *npu_dev); static struct npu_network *alloc_network(struct npu_host_ctx *ctx, struct npu_client *client); Loading Loading @@ -99,7 +97,7 @@ static int wait_npu_cpc_power_off(struct npu_device *npu_dev) uint32_t wait_cnt = 0, max_wait_ms; struct npu_host_ctx *host_ctx = &npu_dev->host_ctx; max_wait_ms = NPU_FW_TIMEOUT_MS; max_wait_ms = NPU_FW_ACK_TIMEOUT_MS; do { reg_val = npu_tcsr_reg_read(npu_dev, TCSR_NPU_CPC_PWR_ON); Loading Loading @@ -155,7 +153,8 @@ static int load_fw_nolock(struct npu_device *npu_dev, bool enable) /* Keep reading ctrl status until NPU is ready */ ret = wait_for_status_ready(npu_dev, REG_NPU_FW_CTRL_STATUS, FW_CTRL_STATUS_MAIN_THREAD_READY_VAL, false); FW_CTRL_STATUS_MAIN_THREAD_READY_VAL, NPU_FW_BRINGUP_TIMEOUT_MS, false); if (ret) goto load_fw_fail; Loading Loading @@ -521,7 +520,8 @@ static int npu_notify_fw_pwr_state(struct npu_device *npu_dev, NPU_ERR("NPU_IPC_CMD_NOTIFY_PWR sent failed: %d\n", ret); } else { ret = wait_for_status_ready(npu_dev, REG_NPU_FW_CTRL_STATUS, FW_CTRL_STATUS_PWR_NOTIFY_DONE_VAL, true); FW_CTRL_STATUS_PWR_NOTIFY_DONE_VAL, NPU_FW_ACK_TIMEOUT_MS, true); if (!ret) { reg_val = REGR(npu_dev, REG_NPU_FW_CTRL_STATUS); if (reg_val & FW_CTRL_STATUS_PWR_NOTIFY_ERR_VAL) { Loading Loading @@ -917,7 +917,8 @@ static int host_error_hdlr(struct npu_device *npu_dev, bool force) /* Keep reading ctrl status until NPU is ready */ ret = wait_for_status_ready(npu_dev, REG_NPU_FW_CTRL_STATUS, FW_CTRL_STATUS_MAIN_THREAD_READY_VAL, false); FW_CTRL_STATUS_MAIN_THREAD_READY_VAL, NPU_FW_BRINGUP_TIMEOUT_MS, false); if (ret) { NPU_ERR("wait for fw status ready timedout\n"); goto fw_start_done; Loading Loading @@ -1163,14 +1164,15 @@ static void turn_off_fw_logging(struct npu_device *npu_dev) } static int wait_for_status_ready(struct npu_device *npu_dev, uint32_t status_reg, uint32_t status_bits, bool poll) uint32_t status_reg, uint32_t status_bits, uint32_t timeout_ms, bool poll) { uint32_t ctrl_sts = 0; uint32_t wait_cnt = 0, max_wait_ms; struct npu_host_ctx *host_ctx = &npu_dev->host_ctx; max_wait_ms = (host_ctx->fw_dbg_mode & FW_DBG_MODE_INC_TIMEOUT) ? NW_DEBUG_TIMEOUT_MS : NPU_FW_TIMEOUT_MS; NW_DEBUG_TIMEOUT_MS : timeout_ms; if (poll) wait_cnt = max_wait_ms * 10; else Loading
drivers/media/platform/msm/npu/npu_mgr.h +4 −1 Original line number Diff line number Diff line /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved. * Copyright (c) 2017-2020, The Linux Foundation. All rights reserved. */ #ifndef _NPU_MGR_H Loading Loading @@ -28,6 +28,9 @@ #define NW_DEBUG_TIMEOUT msecs_to_jiffies(NW_DEBUG_TIMEOUT_MS) #define NPU_MBOX_IDLE_TIMEOUT_MS 500 /* set for 500ms */ #define NPU_MBOX_IDLE_TIMEOUT msecs_to_jiffies(NPU_MBOX_IDLE_TIMEOUT_MS) #define NPU_FW_TIMEOUT_POLL_INTERVAL_MS 10 #define NPU_FW_ACK_TIMEOUT_MS 5000 #define NPU_FW_BRINGUP_TIMEOUT_MS (1000 * 60) /* set for 60 seconds */ #define FIRMWARE_VERSION 0x00001000 #define MAX_LOADED_NETWORK 32 #define NPU_IPC_BUF_LENGTH 4096 Loading