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Commit c5781351 authored by Michal Wajdeczko's avatar Michal Wajdeczko Committed by Chris Wilson
Browse files

drm/i915: Change parameters order in i915_gem_batch_pool_init 



Function i915_gem_batch_pool_init() failed to follow obj-verb
naming schema. Fix that by swapping function parameters.
While here, change license text to SPDX format.

v2: use intel_engine_init_batch_pool (Chris) as proxy (Michal)

Signed-off-by: default avatarMichal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20180308095037.18264-3-michal.wajdeczko@intel.com
parent ff491603

drivers/gpu/drm/i915/i915_gem_batch_pool.c

+6 −24
Original line number Diff line number Diff line 
/*

 * Copyright © 2014 Intel Corporation

 *

 * Permission is hereby granted, free of charge, to any person obtaining a

 * copy of this software and associated documentation files (the "Software"),

 * to deal in the Software without restriction, including without limitation

 * the rights to use, copy, modify, merge, publish, distribute, sublicense,

 * and/or sell copies of the Software, and to permit persons to whom the

 * Software is furnished to do so, subject to the following conditions:

 *

 * The above copyright notice and this permission notice (including the next

 * paragraph) shall be included in all copies or substantial portions of the

 * Software.

 *

 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR

 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,

 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL

 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER

 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING

 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS

 * IN THE SOFTWARE.

 * SPDX-License-Identifier: MIT

 *

 * Copyright © 2014-2018 Intel Corporation

 */



#include "i915_drv.h"

#include "i915_gem_batch_pool.h"

#include "i915_drv.h"



/**

 * DOC: batch pool
@@ -41,11 +23,11 @@ 


/**

 * i915_gem_batch_pool_init() - initialize a batch buffer pool

 * @engine: the associated request submission engine

 * @pool: the batch buffer pool

 * @engine: the associated request submission engine

 */

void i915_gem_batch_pool_init(struct intel_engine_cs *engine,

			      struct i915_gem_batch_pool *pool)

void i915_gem_batch_pool_init(struct i915_gem_batch_pool *pool,

			      struct intel_engine_cs *engine)

{

	int n;

drivers/gpu/drm/i915/i915_gem_batch_pool.h

+5 −24
Original line number Diff line number Diff line 
/*

 * Copyright © 2014 Intel Corporation

 *

 * Permission is hereby granted, free of charge, to any person obtaining a

 * copy of this software and associated documentation files (the "Software"),

 * to deal in the Software without restriction, including without limitation

 * the rights to use, copy, modify, merge, publish, distribute, sublicense,

 * and/or sell copies of the Software, and to permit persons to whom the

 * Software is furnished to do so, subject to the following conditions:

 *

 * The above copyright notice and this permission notice (including the next

 * paragraph) shall be included in all copies or substantial portions of the

 * Software.

 *

 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR

 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,

 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL

 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER

 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING

 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS

 * IN THE SOFTWARE.

 * SPDX-License-Identifier: MIT

 *

 * Copyright © 2014-2018 Intel Corporation

 */



#ifndef I915_GEM_BATCH_POOL_H

#define I915_GEM_BATCH_POOL_H



#include "i915_drv.h"

#include <linux/types.h>



struct intel_engine_cs;
@@ -34,9 +16,8 @@ struct i915_gem_batch_pool { 
	struct list_head cache_list[4];

};



/* i915_gem_batch_pool.c */

void i915_gem_batch_pool_init(struct intel_engine_cs *engine,

			      struct i915_gem_batch_pool *pool);

void i915_gem_batch_pool_init(struct i915_gem_batch_pool *pool,

			      struct intel_engine_cs *engine);

void i915_gem_batch_pool_fini(struct i915_gem_batch_pool *pool);

struct drm_i915_gem_object*

i915_gem_batch_pool_get(struct i915_gem_batch_pool *pool, size_t size);

drivers/gpu/drm/i915/intel_engine_cs.c

+6 −3
Original line number Diff line number Diff line
@@ -441,6 +441,11 @@ static void intel_engine_init_timeline(struct intel_engine_cs *engine) 
	engine->timeline = &engine->i915->gt.global_timeline.engine[engine->id];

}



static void intel_engine_init_batch_pool(struct intel_engine_cs *engine)

{

	i915_gem_batch_pool_init(&engine->batch_pool, engine);

}



static bool csb_force_mmio(struct drm_i915_private *i915)

{

	/*
@@ -485,11 +490,9 @@ static void intel_engine_init_execlist(struct intel_engine_cs *engine) 
void intel_engine_setup_common(struct intel_engine_cs *engine)

{

	intel_engine_init_execlist(engine);



	intel_engine_init_timeline(engine);

	intel_engine_init_hangcheck(engine);

	i915_gem_batch_pool_init(engine, &engine->batch_pool);



	intel_engine_init_batch_pool(engine);

	intel_engine_init_cmd_parser(engine);

}