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Commit c565e146 authored by Fabio Estevam's avatar Fabio Estevam Committed by Shawn Guo
Browse files

ARM: dts: imx6sx-sdb: Add QSPI support 



imx6sx-sdb has two s25fl128s quad spi flash. Add support for them.

Signed-off-by: default avatarFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: default avatarShawn Guo <shawn.guo@linaro.org>
parent c9997ba2

arch/arm/boot/dts/imx6sx-sdb.dts

+39 −0
Original line number Original line Diff line number Diff line
@@ -340,6 +340,28 @@ 
	status = "okay";

	status = "okay";

};

};





&qspi2 {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_qspi2>;

	status = "okay";



	flash0: s25fl128s@0 {

		reg = <0>;

		#address-cells = <1>;

		#size-cells = <1>;

		compatible = "spansion,s25fl128s";

		spi-max-frequency = <66000000>;

	};



	flash1: s25fl128s@1 {

		reg = <1>;

		#address-cells = <1>;

		#size-cells = <1>;

		compatible = "spansion,s25fl128s";

		spi-max-frequency = <66000000>;

	};

};



&ssi2 {

&ssi2 {

	status = "okay";

	status = "okay";

};

};
@@ -524,6 +546,23 @@ 
			>;

			>;

		};

		};





		pinctrl_qspi2: qspi2grp {

			fsl,pins = <

				MX6SX_PAD_NAND_WP_B__QSPI2_A_DATA_0     0x70f1

				MX6SX_PAD_NAND_READY_B__QSPI2_A_DATA_1  0x70f1

				MX6SX_PAD_NAND_CE0_B__QSPI2_A_DATA_2    0x70f1

				MX6SX_PAD_NAND_CE1_B__QSPI2_A_DATA_3    0x70f1

				MX6SX_PAD_NAND_CLE__QSPI2_A_SCLK        0x70f1

				MX6SX_PAD_NAND_ALE__QSPI2_A_SS0_B       0x70f1

				MX6SX_PAD_NAND_DATA01__QSPI2_B_DATA_0   0x70f1

				MX6SX_PAD_NAND_DATA00__QSPI2_B_DATA_1   0x70f1

				MX6SX_PAD_NAND_WE_B__QSPI2_B_DATA_2     0x70f1

				MX6SX_PAD_NAND_RE_B__QSPI2_B_DATA_3     0x70f1

				MX6SX_PAD_NAND_DATA02__QSPI2_B_SCLK     0x70f1

				MX6SX_PAD_NAND_DATA03__QSPI2_B_SS0_B    0x70f1

			>;

		};



		pinctrl_vcc_sd3: vccsd3grp {

		pinctrl_vcc_sd3: vccsd3grp {

			fsl,pins = <

			fsl,pins = <

				MX6SX_PAD_KEY_COL1__GPIO2_IO_11		0x17059

				MX6SX_PAD_KEY_COL1__GPIO2_IO_11		0x17059