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Commit c4e85412 authored by Dave Airlie's avatar Dave Airlie
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Merge tag 'drm-intel-next-2014-05-23' of git://anongit.freedesktop.org/drm-intel into drm-next 

- prep refactoring for execlists (Oscar Mateo)
- corner-case fixes for runtime pm (Imre)
- tons of vblank improvements from Ville
- prep work for atomic plane/sprite updates (Ville)
- more chv code, now almost complete (tons of different people)
- refactoring and improvements for drm_irq.c merged through drm-intel-next
- g4x/ilk reset improvements (Ville)
- removal of encoder->mode_set
- moved audio state tracking into pipe_config
- shuffled fb pinning out of the platform crtc modeset callbacks into core code
- userptr support (Chris)
- OOM handling improvements from Chris, with now have a neat oom notifier which
  jumps additional debug information.
- topdown allocation of ppgtt PDEs (Ben)
- fixes and small improvements all over

* tag 'drm-intel-next-2014-05-23' of git://anongit.freedesktop.org/drm-intel: (187 commits)
  drm/i915: Kill private_default_ctx off
  drm/i915: s/i915_hw_context/intel_context
  drm/i915: Split the ringbuffers from the rings (3/3)
  drm/i915: Split the ringbuffers from the rings (2/3)
  drm/i915: Split the ringbuffers from the rings (1/3)
  drm/i915: s/intel_ring_buffer/intel_engine_cs
  drm/i915: disable GT power saving early during system suspend
  drm/i915: fix possible RPM ref leaking during RPS disabling
  drm/i915: remove user GTT mappings early during runtime suspend
  drm/i915: Implement WaVcpClkGateDisableForMediaReset:ctg, elk
  drm/i915: Fix gen2 and hsw+ scanline counter
  drm/i915: Draw a picture about video timings
  drm/i915: Improve gen3/4 frame counter
  drm/i915: Add a small adjustment to the pixel counter on interlaced modes
  drm/i915: Hold CRTC lock whilst freezing the planes
  drm/i915: Only discard backing storage on releasing the last ref
  drm/i915: Wait for pending page flips before enabling/disabling the primary plane
  drm/i915: grab the audio power domain when enabling audio on HSW+
  drm/i915: don't read HSW_AUD_PIN_ELD_CP_VLD when the power well is off
  drm/i915: move bsd dispatch index somewhere better
  ...
parents 182407a6 f83d6518

Documentation/DocBook/drm.tmpl

+100 −7
Original line number Diff line number Diff line
@@ -3368,6 +3368,10 @@ void (*disable_vblank) (struct drm_device *dev, int crtc);</synopsis> 
      with a call to <function>drm_vblank_cleanup</function> in the driver

      <methodname>unload</methodname> operation handler.

    </para>

    <sect2>

      <title>Vertical Blanking and Interrupt Handling Functions Reference</title>

!Edrivers/gpu/drm/drm_irq.c

    </sect2>

  </sect1>



  <!-- Internals: open/close, file operations and ioctls -->
@@ -3710,17 +3714,16 @@ int num_ioctls;</synopsis> 
            <term>DRM_IOCTL_MODESET_CTL</term>

            <listitem>

              <para>

                This should be called by application level drivers before and

                after mode setting, since on many devices the vertical blank

                counter is reset at that time.  Internally, the DRM snapshots

                the last vblank count when the ioctl is called with the

                _DRM_PRE_MODESET command, so that the counter won't go backwards

                (which is dealt with when _DRM_POST_MODESET is used).

		This was only used for user-mode-settind drivers around

		modesetting changes to allow the kernel to update the vblank

		interrupt after mode setting, since on many devices the vertical

		blank counter is reset to 0 at some point during modeset. Modern

		drivers should not call this any more since with kernel mode

		setting it is a no-op.

              </para>

            </listitem>

          </varlistentry>

        </variablelist>

<!--!Edrivers/char/drm/drm_irq.c-->

      </para>

    </sect1>
@@ -3783,6 +3786,96 @@ int num_ioctls;</synopsis> 
	  probing, so those sections fully apply.

        </para>

      </sect2>

      <sect2>

        <title>DPIO</title>

!Pdrivers/gpu/drm/i915/i915_reg.h DPIO

	<table id="dpiox2">

	  <title>Dual channel PHY (VLV/CHV)</title>

	  <tgroup cols="8">

	    <colspec colname="c0" />

	    <colspec colname="c1" />

	    <colspec colname="c2" />

	    <colspec colname="c3" />

	    <colspec colname="c4" />

	    <colspec colname="c5" />

	    <colspec colname="c6" />

	    <colspec colname="c7" />

	    <spanspec spanname="ch0" namest="c0" nameend="c3" />

	    <spanspec spanname="ch1" namest="c4" nameend="c7" />

	    <spanspec spanname="ch0pcs01" namest="c0" nameend="c1" />

	    <spanspec spanname="ch0pcs23" namest="c2" nameend="c3" />

	    <spanspec spanname="ch1pcs01" namest="c4" nameend="c5" />

	    <spanspec spanname="ch1pcs23" namest="c6" nameend="c7" />

	    <thead>

	      <row>

		<entry spanname="ch0">CH0</entry>

		<entry spanname="ch1">CH1</entry>

	      </row>

	    </thead>

	    <tbody valign="top" align="center">

	      <row>

		<entry spanname="ch0">CMN/PLL/REF</entry>

		<entry spanname="ch1">CMN/PLL/REF</entry>

	      </row>

	      <row>

		<entry spanname="ch0pcs01">PCS01</entry>

		<entry spanname="ch0pcs23">PCS23</entry>

		<entry spanname="ch1pcs01">PCS01</entry>

		<entry spanname="ch1pcs23">PCS23</entry>

	      </row>

	      <row>

		<entry>TX0</entry>

		<entry>TX1</entry>

		<entry>TX2</entry>

		<entry>TX3</entry>

		<entry>TX0</entry>

		<entry>TX1</entry>

		<entry>TX2</entry>

		<entry>TX3</entry>

	      </row>

	      <row>

		<entry spanname="ch0">DDI0</entry>

		<entry spanname="ch1">DDI1</entry>

	      </row>

	    </tbody>

	  </tgroup>

	</table>

	<table id="dpiox1">

	  <title>Single channel PHY (CHV)</title>

	  <tgroup cols="4">

	    <colspec colname="c0" />

	    <colspec colname="c1" />

	    <colspec colname="c2" />

	    <colspec colname="c3" />

	    <spanspec spanname="ch0" namest="c0" nameend="c3" />

	    <spanspec spanname="ch0pcs01" namest="c0" nameend="c1" />

	    <spanspec spanname="ch0pcs23" namest="c2" nameend="c3" />

	    <thead>

	      <row>

		<entry spanname="ch0">CH0</entry>

	      </row>

	    </thead>

	    <tbody valign="top" align="center">

	      <row>

		<entry spanname="ch0">CMN/PLL/REF</entry>

	      </row>

	      <row>

		<entry spanname="ch0pcs01">PCS01</entry>

		<entry spanname="ch0pcs23">PCS23</entry>

	      </row>

	      <row>

		<entry>TX0</entry>

		<entry>TX1</entry>

		<entry>TX2</entry>

		<entry>TX3</entry>

	      </row>

	      <row>

		<entry spanname="ch0">DDI2</entry>

	      </row>

	    </tbody>

	  </tgroup>

	</table>

      </sect2>

    </sect1>



    <sect1>

arch/x86/kernel/early-quirks.c

+36 −10
Original line number Diff line number Diff line
@@ -418,7 +418,7 @@ static size_t __init gen6_stolen_size(int num, int slot, int func) 
	return gmch_ctrl << 25; /* 32 MB units */

}



static size_t gen8_stolen_size(int num, int slot, int func)

static size_t __init gen8_stolen_size(int num, int slot, int func)

{

	u16 gmch_ctrl;
@@ -428,48 +428,73 @@ static size_t gen8_stolen_size(int num, int slot, int func) 
	return gmch_ctrl << 25; /* 32 MB units */

}



static size_t __init chv_stolen_size(int num, int slot, int func)

{

	u16 gmch_ctrl;



	gmch_ctrl = read_pci_config_16(num, slot, func, SNB_GMCH_CTRL);

	gmch_ctrl >>= SNB_GMCH_GMS_SHIFT;

	gmch_ctrl &= SNB_GMCH_GMS_MASK;



	/*

	 * 0x0  to 0x10: 32MB increments starting at 0MB

	 * 0x11 to 0x16: 4MB increments starting at 8MB

	 * 0x17 to 0x1d: 4MB increments start at 36MB

	 */

	if (gmch_ctrl < 0x11)

		return gmch_ctrl << 25;

	else if (gmch_ctrl < 0x17)

		return (gmch_ctrl - 0x11 + 2) << 22;

	else

		return (gmch_ctrl - 0x17 + 9) << 22;

}



struct intel_stolen_funcs {

	size_t (*size)(int num, int slot, int func);

	u32 (*base)(int num, int slot, int func, size_t size);

};



static const struct intel_stolen_funcs i830_stolen_funcs = {

static const struct intel_stolen_funcs i830_stolen_funcs __initconst = {

	.base = i830_stolen_base,

	.size = i830_stolen_size,

};



static const struct intel_stolen_funcs i845_stolen_funcs = {

static const struct intel_stolen_funcs i845_stolen_funcs __initconst = {

	.base = i845_stolen_base,

	.size = i830_stolen_size,

};



static const struct intel_stolen_funcs i85x_stolen_funcs = {

static const struct intel_stolen_funcs i85x_stolen_funcs __initconst = {

	.base = i85x_stolen_base,

	.size = gen3_stolen_size,

};



static const struct intel_stolen_funcs i865_stolen_funcs = {

static const struct intel_stolen_funcs i865_stolen_funcs __initconst = {

	.base = i865_stolen_base,

	.size = gen3_stolen_size,

};



static const struct intel_stolen_funcs gen3_stolen_funcs = {

static const struct intel_stolen_funcs gen3_stolen_funcs __initconst = {

	.base = intel_stolen_base,

	.size = gen3_stolen_size,

};



static const struct intel_stolen_funcs gen6_stolen_funcs = {

static const struct intel_stolen_funcs gen6_stolen_funcs __initconst = {

	.base = intel_stolen_base,

	.size = gen6_stolen_size,

};



static const struct intel_stolen_funcs gen8_stolen_funcs = {

static const struct intel_stolen_funcs gen8_stolen_funcs __initconst = {

	.base = intel_stolen_base,

	.size = gen8_stolen_size,

};



static struct pci_device_id intel_stolen_ids[] __initdata = {

static const struct intel_stolen_funcs chv_stolen_funcs __initconst = {

	.base = intel_stolen_base,

	.size = chv_stolen_size,

};



static const struct pci_device_id intel_stolen_ids[] __initconst = {

	INTEL_I830_IDS(&i830_stolen_funcs),

	INTEL_I845G_IDS(&i845_stolen_funcs),

	INTEL_I85X_IDS(&i85x_stolen_funcs),
@@ -495,7 +520,8 @@ static struct pci_device_id intel_stolen_ids[] __initdata = { 
	INTEL_HSW_D_IDS(&gen6_stolen_funcs),

	INTEL_HSW_M_IDS(&gen6_stolen_funcs),

	INTEL_BDW_M_IDS(&gen8_stolen_funcs),

	INTEL_BDW_D_IDS(&gen8_stolen_funcs)

	INTEL_BDW_D_IDS(&gen8_stolen_funcs),

	INTEL_CHV_IDS(&chv_stolen_funcs),

};



static void __init intel_graphics_stolen(int num, int slot, int func)

drivers/gpu/drm/drm_irq.c

+270 −86

File changed.

Preview size limit exceeded, changes collapsed.

drivers/gpu/drm/i915/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -5,6 +5,7 @@ config DRM_I915 
	depends on (AGP || AGP=n)

	select INTEL_GTT

	select AGP_INTEL if AGP

	select INTERVAL_TREE

	# we need shmfs for the swappable backing store, and in particular

	# the shmem_readpage() which depends upon tmpfs

	select SHMEM

drivers/gpu/drm/i915/Makefile

+7 −0
Original line number Diff line number Diff line
@@ -18,6 +18,7 @@ i915-$(CONFIG_DEBUG_FS) += i915_debugfs.o 
# GEM code

i915-y += i915_cmd_parser.o \

	  i915_gem_context.o \

	  i915_gem_render_state.o \

	  i915_gem_debug.o \

	  i915_gem_dmabuf.o \

	  i915_gem_evict.o \
@@ -26,12 +27,18 @@ i915-y += i915_cmd_parser.o \ 
	  i915_gem.o \

	  i915_gem_stolen.o \

	  i915_gem_tiling.o \

	  i915_gem_userptr.o \

	  i915_gpu_error.o \

	  i915_irq.o \

	  i915_trace_points.o \

	  intel_ringbuffer.o \

	  intel_uncore.o



# autogenerated null render state

i915-y += intel_renderstate_gen6.o \

	  intel_renderstate_gen7.o \

	  intel_renderstate_gen8.o



# modesetting core code

i915-y += intel_bios.o \

	  intel_display.o \