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Commit c430131a authored by Jan Andersson's avatar Jan Andersson Committed by Greg Kroah-Hartman
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USB: EHCI: Support controllers with big endian capability regs 



The two first HC capability registers (CAPLENGTH and HCIVERSION)
are defined as one 8-bit and one 16-bit register. Most HC
implementations have selected to treat these registers as part
of a 32-bit register, giving the same layout for both big and
small endian systems.

This patch adds a new quirk, big_endian_capbase, to support
controllers with big endian register interfaces that treat
HCIVERSION and CAPLENGTH as individual registers.

Signed-off-by: default avatarJan Andersson <jan@gaisler.com>
Acked-by: default avatarAlan Stern <stern@rowland.harvard.edu>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
parent 2ce2c3ac

drivers/usb/early/ehci-dbgp.c

+4 −1
Original line number Diff line number Diff line
@@ -102,6 +102,9 @@ static struct kgdb_io kgdbdbgp_io_ops; 
#define dbgp_kgdb_mode (0)

#endif



/* Local version of HC_LENGTH macro as ehci struct is not available here */

#define EARLY_HC_LENGTH(p)	(0x00ff & (p)) /* bits 7 : 0 */



/*

 * USB Packet IDs (PIDs)

 */
@@ -892,7 +895,7 @@ int __init early_dbgp_init(char *s) 
	dbgp_printk("ehci_bar: %p\n", ehci_bar);



	ehci_caps  = ehci_bar;

	ehci_regs  = ehci_bar + HC_LENGTH(readl(&ehci_caps->hc_capbase));

	ehci_regs  = ehci_bar + EARLY_HC_LENGTH(readl(&ehci_caps->hc_capbase));

	ehci_debug = ehci_bar + offset;

	ehci_dev.bus = bus;

	ehci_dev.slot = slot;

drivers/usb/host/ehci-ath79.c

+4 −4
Original line number Diff line number Diff line
@@ -44,6 +44,7 @@ static int ehci_ath79_init(struct usb_hcd *hcd) 
	struct ehci_hcd *ehci = hcd_to_ehci(hcd);

	struct platform_device *pdev = to_platform_device(hcd->self.controller);

	const struct platform_device_id *id;

	int hclength;

	int ret;



	id = platform_get_device_id(pdev);
@@ -52,21 +53,20 @@ static int ehci_ath79_init(struct usb_hcd *hcd) 
		return -EINVAL;

	}



	hclength = HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));

	switch (id->driver_data) {

	case EHCI_ATH79_IP_V1:

		ehci->has_synopsys_hc_bug = 1;



		ehci->caps = hcd->regs;

		ehci->regs = hcd->regs +

			HC_LENGTH(ehci_readl(ehci, &ehci->caps->hc_capbase));

		ehci->regs = hcd->regs + hclength;

		break;



	case EHCI_ATH79_IP_V2:

		hcd->has_tt = 1;



		ehci->caps = hcd->regs + 0x100;

		ehci->regs = hcd->regs + 0x100 +

			HC_LENGTH(ehci_readl(ehci, &ehci->caps->hc_capbase));

		ehci->regs = hcd->regs + 0x100 + hclength;

		break;



	default:

drivers/usb/host/ehci-atmel.c

+1 −1
Original line number Diff line number Diff line
@@ -56,7 +56,7 @@ static int ehci_atmel_setup(struct usb_hcd *hcd) 
	/* registers start at offset 0x0 */

	ehci->caps = hcd->regs;

	ehci->regs = hcd->regs +

		HC_LENGTH(ehci_readl(ehci, &ehci->caps->hc_capbase));

		HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));

	dbg_hcs_params(ehci, "reset");

	dbg_hcc_params(ehci, "reset");

drivers/usb/host/ehci-au1xxx.c

+2 −1
Original line number Diff line number Diff line
@@ -175,7 +175,8 @@ static int ehci_hcd_au1xxx_drv_probe(struct platform_device *pdev) 


	ehci = hcd_to_ehci(hcd);

	ehci->caps = hcd->regs;

	ehci->regs = hcd->regs + HC_LENGTH(readl(&ehci->caps->hc_capbase));

	ehci->regs = hcd->regs +

		HC_LENGTH(ehci, readl(&ehci->caps->hc_capbase));

	/* cache this readonly data; minimize chip reads */

	ehci->hcs_params = readl(&ehci->caps->hcs_params);

drivers/usb/host/ehci-cns3xxx.c

+1 −1
Original line number Diff line number Diff line
@@ -34,7 +34,7 @@ static int cns3xxx_ehci_init(struct usb_hcd *hcd) 


	ehci->caps = hcd->regs;

	ehci->regs = hcd->regs

		+ HC_LENGTH(ehci_readl(ehci, &ehci->caps->hc_capbase));

		+ HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));

	ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);



	hcd->has_tt = 0;