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Commit c3e6dc65 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'at91-drivers' of... 

Merge tag 'at91-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91 into next/drivers

Pull "First batch of drivers for 3.19" from Nicolas Ferre:

It is only about a not so recent driver for old platforms: RTT as RTC driver:
- RTT as RTC driver enhancements and machine specific include files removal
- RTT as RTC driver conversion to device tree

* tag 'at91-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91

:
  rtc: at91sam9: add DT bindings documentation
  rtc: at91sam9: use clk API instead of relying on AT91_SLOW_CLOCK
  ARM: at91: add clk_lookup entry for RTT devices
  rtc: at91sam9: rework the Kconfig description
  rtc: at91sam9: make use of syscon/regmap to access GPBR registers
  rtc: at91sam9: add DT support
  rtc: at91sam9: replace devm_ioremap by devm_ioremap_resource
  rtc: at91sam9: use standard readl/writel functions instead of raw versions
  rtc: at91sam9: remove references to mach specific headers

Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 27bc375a 2c91e61d

Documentation/devicetree/bindings/rtc/atmel,at91sam9-rtc.txt

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+23 −0
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Atmel AT91SAM9260 Real Time Timer



Required properties:

- compatible: should be: "atmel,at91sam9260-rtt"

- reg: should encode the memory region of the RTT controller

- interrupts: rtt alarm/event interrupt

- clocks: should contain the 32 KHz slow clk that will drive the RTT block.

- atmel,rtt-rtc-time-reg: should encode the GPBR register used to store

	the time base when the RTT is used as an RTC.

	The first cell should point to the GPBR node and the second one

	encode the offset within the GPBR block (or in other words, the

	GPBR register used to store the time base).





Example:



rtt@fffffd20 {

	compatible = "atmel,at91sam9260-rtt";

	reg = <0xfffffd20 0x10>;

	interrupts = <1 4 7>;

	clocks = <&clk32k>;

	atmel,rtt-rtc-time-reg = <&gpbr 0x0>;

};

arch/arm/mach-at91/at91sam9260.c

+2 −0
Original line number Original line Diff line number Diff line
@@ -217,6 +217,7 @@ static struct clk_lookup periph_clocks_lookups[] = { 
	CLKDEV_CON_DEV_ID("pclk", "fffbc000.ssc", &ssc_clk),

	CLKDEV_CON_DEV_ID("pclk", "fffbc000.ssc", &ssc_clk),

	CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9260.0", &twi_clk),

	CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9260.0", &twi_clk),

	CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9g20.0", &twi_clk),

	CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9g20.0", &twi_clk),

	CLKDEV_CON_DEV_ID(NULL, "rtc-at91sam9.0", &clk32k),

	/* more usart lookup table for DT entries */

	/* more usart lookup table for DT entries */

	CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck),

	CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck),

	CLKDEV_CON_DEV_ID("usart", "fffb0000.serial", &usart0_clk),

	CLKDEV_CON_DEV_ID("usart", "fffb0000.serial", &usart0_clk),
@@ -237,6 +238,7 @@ static struct clk_lookup periph_clocks_lookups[] = { 
	CLKDEV_CON_DEV_ID("mci_clk", "fffa8000.mmc", &mmc_clk),

	CLKDEV_CON_DEV_ID("mci_clk", "fffa8000.mmc", &mmc_clk),

	CLKDEV_CON_DEV_ID("spi_clk", "fffc8000.spi", &spi0_clk),

	CLKDEV_CON_DEV_ID("spi_clk", "fffc8000.spi", &spi0_clk),

	CLKDEV_CON_DEV_ID("spi_clk", "fffcc000.spi", &spi1_clk),

	CLKDEV_CON_DEV_ID("spi_clk", "fffcc000.spi", &spi1_clk),

	CLKDEV_CON_DEV_ID(NULL, "fffffd20.rtc", &clk32k),

	/* fake hclk clock */

	/* fake hclk clock */

	CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),

	CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),

	CLKDEV_CON_ID("pioA", &pioA_clk),

	CLKDEV_CON_ID("pioA", &pioA_clk),

arch/arm/mach-at91/at91sam9261.c

+2 −0
Original line number Original line Diff line number Diff line
@@ -192,6 +192,7 @@ static struct clk_lookup periph_clocks_lookups[] = { 
	CLKDEV_CON_ID("pioA", &pioA_clk),

	CLKDEV_CON_ID("pioA", &pioA_clk),

	CLKDEV_CON_ID("pioB", &pioB_clk),

	CLKDEV_CON_ID("pioB", &pioB_clk),

	CLKDEV_CON_ID("pioC", &pioC_clk),

	CLKDEV_CON_ID("pioC", &pioC_clk),

	CLKDEV_CON_DEV_ID(NULL, "rtc-at91sam9.0", &clk32k),

	/* more lookup table for DT entries */

	/* more lookup table for DT entries */

	CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck),

	CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck),

	CLKDEV_CON_DEV_ID("usart", "fffb0000.serial", &usart0_clk),

	CLKDEV_CON_DEV_ID("usart", "fffb0000.serial", &usart0_clk),
@@ -209,6 +210,7 @@ static struct clk_lookup periph_clocks_lookups[] = { 
	CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioA_clk),

	CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioA_clk),

	CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioB_clk),

	CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioB_clk),

	CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioC_clk),

	CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioC_clk),

	CLKDEV_CON_DEV_ID(NULL, "fffffd20.rtc", &clk32k),

};

};





static struct clk_lookup usart_clocks_lookups[] = {

static struct clk_lookup usart_clocks_lookups[] = {

arch/arm/mach-at91/at91sam9263.c

+4 −0
Original line number Original line Diff line number Diff line
@@ -201,6 +201,8 @@ static struct clk_lookup periph_clocks_lookups[] = { 
	CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb_clk),

	CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb_clk),

	CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9260.0", &twi_clk),

	CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9260.0", &twi_clk),

	CLKDEV_CON_DEV_ID(NULL, "at91sam9rl-pwm", &pwm_clk),

	CLKDEV_CON_DEV_ID(NULL, "at91sam9rl-pwm", &pwm_clk),

	CLKDEV_CON_DEV_ID(NULL, "rtc-at91sam9.0", &clk32k),

	CLKDEV_CON_DEV_ID(NULL, "rtc-at91sam9.1", &clk32k),

	/* fake hclk clock */

	/* fake hclk clock */

	CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),

	CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),

	CLKDEV_CON_ID("pioA", &pioA_clk),

	CLKDEV_CON_ID("pioA", &pioA_clk),
@@ -227,6 +229,8 @@ static struct clk_lookup periph_clocks_lookups[] = { 
	CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioCDE_clk),

	CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioCDE_clk),

	CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioCDE_clk),

	CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioCDE_clk),

	CLKDEV_CON_DEV_ID(NULL, "fffb8000.pwm", &pwm_clk),

	CLKDEV_CON_DEV_ID(NULL, "fffb8000.pwm", &pwm_clk),

	CLKDEV_CON_DEV_ID(NULL, "fffffd20.rtc", &clk32k),

	CLKDEV_CON_DEV_ID(NULL, "fffffd50.rtc", &clk32k),

};

};





static struct clk_lookup usart_clocks_lookups[] = {

static struct clk_lookup usart_clocks_lookups[] = {

arch/arm/mach-at91/at91sam9g45.c

+2 −0
Original line number Original line Diff line number Diff line
@@ -254,6 +254,7 @@ static struct clk_lookup periph_clocks_lookups[] = { 
	CLKDEV_CON_DEV_ID(NULL, "atmel_tdes", &aestdessha_clk),

	CLKDEV_CON_DEV_ID(NULL, "atmel_tdes", &aestdessha_clk),

	CLKDEV_CON_DEV_ID(NULL, "atmel_aes", &aestdessha_clk),

	CLKDEV_CON_DEV_ID(NULL, "atmel_aes", &aestdessha_clk),

	CLKDEV_CON_DEV_ID(NULL, "at91sam9rl-pwm", &pwm_clk),

	CLKDEV_CON_DEV_ID(NULL, "at91sam9rl-pwm", &pwm_clk),

	CLKDEV_CON_DEV_ID(NULL, "rtc-at91sam9.0", &clk32k),

	/* more usart lookup table for DT entries */

	/* more usart lookup table for DT entries */

	CLKDEV_CON_DEV_ID("usart", "ffffee00.serial", &mck),

	CLKDEV_CON_DEV_ID("usart", "ffffee00.serial", &mck),

	CLKDEV_CON_DEV_ID("usart", "fff8c000.serial", &usart0_clk),

	CLKDEV_CON_DEV_ID("usart", "fff8c000.serial", &usart0_clk),
@@ -280,6 +281,7 @@ static struct clk_lookup periph_clocks_lookups[] = { 
	CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioC_clk),

	CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioC_clk),

	CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioDE_clk),

	CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioDE_clk),

	CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioDE_clk),

	CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioDE_clk),

	CLKDEV_CON_DEV_ID(NULL, "fffffd20.rtc", &clk32k),





	CLKDEV_CON_ID("pioA", &pioA_clk),

	CLKDEV_CON_ID("pioA", &pioA_clk),

	CLKDEV_CON_ID("pioB", &pioB_clk),

	CLKDEV_CON_ID("pioB", &pioB_clk),