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Commit c3dade5e authored by Evan Quan's avatar Evan Quan Committed by Alex Deucher
Browse files

drm/amd/powerplay: fix wrong clock adjust sequence 



The clocks should be adjusted after display configuration changed.
Otherwise, the socclk and memclk may be forced on an unnecessary higher
level.

Signed-off-by: default avatarEvan Quan <evan.quan@amd.com>
Reviewed-by: default avatarRex Zhu <Rex.Zhu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 97028037

drivers/gpu/drm/amd/powerplay/hwmgr/pp_psm.c

+6 −7
Original line number Diff line number Diff line
@@ -265,19 +265,18 @@ int psm_adjust_power_state_dynamic(struct pp_hwmgr *hwmgr, bool skip, 
	if (skip)

		return 0;



	if (!hwmgr->ps)

		/*

		 * for vega12/vega20 which does not support power state manager

		 * DAL clock limits should also be honoured

		 */

		phm_apply_clock_adjust_rules(hwmgr);



	phm_pre_display_configuration_changed(hwmgr);



	phm_display_configuration_changed(hwmgr);



	if (hwmgr->ps)

		power_state_management(hwmgr, new_ps);

	else

		/*

		 * for vega12/vega20 which does not support power state manager

		 * DAL clock limits should also be honoured

		 */

		phm_apply_clock_adjust_rules(hwmgr);



	phm_notify_smc_display_config_after_ps_adjustment(hwmgr);