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Commit c353bfc6 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'drm-for-v4.15-part2' of git://people.freedesktop.org/~airlied/linux 

Pull more drm updates from Dave Airlie:
 "Fixes/cleanups for rc1, non-desktop flags for VR

   - remove the MSM dt-bindings file Rob managed to push in the previous
     pull.

   - add a property/edid quirk to denote HMD devices, I had these
     hanging around for a few weeks and Keith had done some work on
     them, they are fairly self contained and small, and only affect
     people using HTC Vive VR headsets so far.

   - amdgpu, tegra, tilcdc, fsl fixes

   - some imx-drm cleanups I missed, these seemed pretty small, and no
     reason to hold off.

  I have one TTM regression fix (fixes bochs-vga in qemu) sitting
  locally awaiting review I'll probably send that in a separate pull
  request tomorrow"

* tag 'drm-for-v4.15-part2' of git://people.freedesktop.org/~airlied/linux: (33 commits)
  dt-bindings: remove file that was added accidentally
  drm/edid: quirk HTC vive headset as non-desktop. [v2]
  drm/fb: add support for not enabling fbcon on non-desktop displays [v2]
  drm: add connector info/property for non-desktop displays [v2]
  drm/amdgpu: fix rmmod KCQ disable failed error
  drm/amdgpu: fix kernel hang when starting VNC server
  drm/amdgpu: don't skip attributes when powerplay is enabled
  drm/amd/pp: fix typecast error in powerplay.
  drm/tilcdc: Remove obsolete "ti,tilcdc,slave" dts binding support
  drm/tegra: sor: Reimplement pad clock
  Revert "drm/radeon: dont switch vt on suspend"
  drm/amd/amdgpu: fix over-bound accessing in amdgpu_cs_wait_any_fence
  drm/amd/powerplay: fix unfreeze level smc message for smu7
  drm/amdgpu:fix memleak
  drm/amdgpu:fix memleak in takedown
  drm/amd/pp: fix dpm randomly failed on Vega10
  drm/amdgpu: set f_mapping on exported DMA-bufs
  drm/amdgpu: Properly allocate VM invalidate eng v2
  drm/fsl-dcu: enable IRQ before drm_atomic_helper_resume()
  drm/fsl-dcu: avoid disabling pixel clock twice on suspend
  ...
parents 1d3bc636 98ecf1a3

Documentation/devicetree/bindings/display/imx/fsl-imx-drm.txt

+1 −1
Original line number Diff line number Diff line
@@ -129,7 +129,7 @@ Optional properties: 


example:



display@di0 {

disp0 {

	compatible = "fsl,imx-parallel-display";

	edid = [edid-data];

	interface-pix-fmt = "rgb24";

drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c

+0 −6
Original line number Diff line number Diff line
@@ -59,12 +59,6 @@ static bool check_atom_bios(uint8_t *bios, size_t size) 
		return false;

	}



	tmp = bios[0x18] | (bios[0x19] << 8);

	if (bios[tmp + 0x14] != 0x0) {

		DRM_INFO("Not an x86 BIOS ROM\n");

		return false;

	}



	bios_header_start = bios[0x48] | (bios[0x49] << 8);

	if (!bios_header_start) {

		DRM_INFO("Can't locate bios header\n");

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

+5 −2
Original line number Diff line number Diff line
@@ -1495,8 +1495,11 @@ static int amdgpu_cs_wait_any_fence(struct amdgpu_device *adev, 
	memset(wait, 0, sizeof(*wait));

	wait->out.status = (r > 0);

	wait->out.first_signaled = first;

	/* set return value 0 to indicate success */



	if (first < fence_count && array[first])

		r = array[first]->error;

	else

		r = 0;



err_free_fence_array:

	for (i = 0; i < fence_count; i++)

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

+23 −20
Original line number Diff line number Diff line
@@ -1837,6 +1837,9 @@ static int amdgpu_fini(struct amdgpu_device *adev) 
		adev->ip_blocks[i].status.hw = false;

	}



	if (adev->firmware.load_type == AMDGPU_FW_LOAD_SMU)

		amdgpu_ucode_fini_bo(adev);



	for (i = adev->num_ip_blocks - 1; i >= 0; i--) {

		if (!adev->ip_blocks[i].status.sw)

			continue;
@@ -3261,9 +3264,9 @@ static ssize_t amdgpu_debugfs_regs_read(struct file *f, char __user *buf, 
	pm_pg_lock = (*pos >> 23) & 1;



	if (*pos & (1ULL << 62)) {

		se_bank = (*pos >> 24) & 0x3FF;

		sh_bank = (*pos >> 34) & 0x3FF;

		instance_bank = (*pos >> 44) & 0x3FF;

		se_bank = (*pos & GENMASK_ULL(33, 24)) >> 24;

		sh_bank = (*pos & GENMASK_ULL(43, 34)) >> 34;

		instance_bank = (*pos & GENMASK_ULL(53, 44)) >> 44;



		if (se_bank == 0x3FF)

			se_bank = 0xFFFFFFFF;
@@ -3337,9 +3340,9 @@ static ssize_t amdgpu_debugfs_regs_write(struct file *f, const char __user *buf, 
	pm_pg_lock = (*pos >> 23) & 1;



	if (*pos & (1ULL << 62)) {

		se_bank = (*pos >> 24) & 0x3FF;

		sh_bank = (*pos >> 34) & 0x3FF;

		instance_bank = (*pos >> 44) & 0x3FF;

		se_bank = (*pos & GENMASK_ULL(33, 24)) >> 24;

		sh_bank = (*pos & GENMASK_ULL(43, 34)) >> 34;

		instance_bank = (*pos & GENMASK_ULL(53, 44)) >> 44;



		if (se_bank == 0x3FF)

			se_bank = 0xFFFFFFFF;
@@ -3687,12 +3690,12 @@ static ssize_t amdgpu_debugfs_wave_read(struct file *f, char __user *buf, 
		return -EINVAL;



	/* decode offset */

	offset = (*pos & 0x7F);

	se = ((*pos >> 7) & 0xFF);

	sh = ((*pos >> 15) & 0xFF);

	cu = ((*pos >> 23) & 0xFF);

	wave = ((*pos >> 31) & 0xFF);

	simd = ((*pos >> 37) & 0xFF);

	offset = (*pos & GENMASK_ULL(6, 0));

	se = (*pos & GENMASK_ULL(14, 7)) >> 7;

	sh = (*pos & GENMASK_ULL(22, 15)) >> 15;

	cu = (*pos & GENMASK_ULL(30, 23)) >> 23;

	wave = (*pos & GENMASK_ULL(36, 31)) >> 31;

	simd = (*pos & GENMASK_ULL(44, 37)) >> 37;



	/* switch to the specific se/sh/cu */

	mutex_lock(&adev->grbm_idx_mutex);
@@ -3737,14 +3740,14 @@ static ssize_t amdgpu_debugfs_gpr_read(struct file *f, char __user *buf, 
		return -EINVAL;



	/* decode offset */

	offset = (*pos & 0xFFF);       /* in dwords */

	se = ((*pos >> 12) & 0xFF);

	sh = ((*pos >> 20) & 0xFF);

	cu = ((*pos >> 28) & 0xFF);

	wave = ((*pos >> 36) & 0xFF);

	simd = ((*pos >> 44) & 0xFF);

	thread = ((*pos >> 52) & 0xFF);

	bank = ((*pos >> 60) & 1);

	offset = *pos & GENMASK_ULL(11, 0);

	se = (*pos & GENMASK_ULL(19, 12)) >> 12;

	sh = (*pos & GENMASK_ULL(27, 20)) >> 20;

	cu = (*pos & GENMASK_ULL(35, 28)) >> 28;

	wave = (*pos & GENMASK_ULL(43, 36)) >> 36;

	simd = (*pos & GENMASK_ULL(51, 44)) >> 44;

	thread = (*pos & GENMASK_ULL(59, 52)) >> 52;

	bank = (*pos & GENMASK_ULL(61, 60)) >> 60;



	data = kmalloc_array(1024, sizeof(*data), GFP_KERNEL);

	if (!data)

drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c

+8 −7
Original line number Diff line number Diff line
@@ -63,6 +63,11 @@ int amdgpu_gem_object_create(struct amdgpu_device *adev, unsigned long size, 
			     flags, NULL, resv, 0, &bo);

	if (r) {

		if (r != -ERESTARTSYS) {

			if (flags & AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED) {

				flags &= ~AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED;

				goto retry;

			}



			if (initial_domain == AMDGPU_GEM_DOMAIN_VRAM) {

				initial_domain |= AMDGPU_GEM_DOMAIN_GTT;

				goto retry;
@@ -323,7 +328,7 @@ int amdgpu_gem_userptr_ioctl(struct drm_device *dev, void *data, 
		r = amdgpu_ttm_tt_get_user_pages(bo->tbo.ttm,

						 bo->tbo.ttm->pages);

		if (r)

			goto unlock_mmap_sem;

			goto release_object;



		r = amdgpu_bo_reserve(bo, true);

		if (r)
@@ -348,9 +353,6 @@ int amdgpu_gem_userptr_ioctl(struct drm_device *dev, void *data, 
free_pages:

	release_pages(bo->tbo.ttm->pages, bo->tbo.ttm->num_pages);



unlock_mmap_sem:

	up_read(&current->mm->mmap_sem);



release_object:

	drm_gem_object_put_unlocked(gobj);
@@ -556,9 +558,8 @@ int amdgpu_gem_va_ioctl(struct drm_device *dev, void *data, 


	if (args->va_address < AMDGPU_VA_RESERVED_SIZE) {

		dev_err(&dev->pdev->dev,

			"va_address 0x%lX is in reserved area 0x%X\n",

			(unsigned long)args->va_address,

			AMDGPU_VA_RESERVED_SIZE);

			"va_address 0x%LX is in reserved area 0x%LX\n",

			args->va_address, AMDGPU_VA_RESERVED_SIZE);

		return -EINVAL;

	}