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Commit c2fe5944 authored by Timur Tabi's avatar Timur Tabi Committed by Kumar Gala
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powerpc: add SSI-to-DMA properties to Freescale MPC8610 HPCD device tree



Add the fsl,playback-dma and fsl,capture-dma properties to the Freescale
MPC8610 HPCD device tree.  These properties connect the SSI nodes to the
DMA nodes for the DMA channels that the SSI should use.  Also update the
ssi.txt documentation.

These properties will be needed when the ASoC V2 version of the Freescale
MPC8610 device drivers are merged into the mainline.

Signed-off-by: default avatarTimur Tabi <timur@freescale.com>
Signed-off-by: default avatarKumar Gala <galak@kernel.crashing.org>
parent f1eaf16a
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+15 −0
Original line number Diff line number Diff line
@@ -24,6 +24,12 @@ Required properties:
		    "rj-master" - r.j., SSI is clock master
		    "ac97-slave" - AC97 mode, SSI is clock slave
		    "ac97-master" - AC97 mode, SSI is clock master
- fsl,playback-dma: phandle to a DMA node for the DMA channel to use for
		    playback of audio.  This is typically dictated by SOC
		    design.  See the notes below.
- fsl,capture-dma:  phandle to a DMA node for the DMA channel to use for
		    capture (recording) of audio.  This is typically dictated
		    by SOC design.  See the notes below.

Optional properties:
- codec-handle	  : phandle to a 'codec' node that defines an audio
@@ -36,3 +42,12 @@ Child 'codec' node required properties:
Child 'codec' node optional properties:
- clock-frequency  : The frequency of the input clock, which typically
                     comes from an on-board dedicated oscillator.

Notes on fsl,playback-dma and fsl,capture-dma:

On SOCs that have an SSI, specific DMA channels are hard-wired for playback
and capture.  On the MPC8610, for example, SSI1 must use DMA channel 0 for
playback and DMA channel 1 for capture.  SSI2 must use DMA channel 2 for
playback and DMA channel 3 for capture.  The developer can choose which
DMA controller to use, but the channels themselves are hard-wired.  The
purpose of these two properties is to represent this hardware design.
+5 −3
Original line number Diff line number Diff line
@@ -207,7 +207,7 @@
			reg = <0xe4000 0x100>;
		};

		i2s@16000 {
		ssi@16000 {
			compatible = "fsl,mpc8610-ssi";
			cell-index = <0>;
			reg = <0x16000 0x100>;
@@ -215,6 +215,8 @@
			interrupts = <62 2>;
			fsl,mode = "i2s-slave";
			codec-handle = <&cs4270>;
			fsl,playback-dma = <&dma00>;
			fsl,capture-dma = <&dma01>;
		};

		ssi@16100 {
@@ -233,7 +235,7 @@
			reg = <0x21300 0x4>; /* DMA general status register */
			ranges = <0x0 0x21100 0x200>;

			dma-channel@0 {
			dma00: dma-channel@0 {
				compatible = "fsl,mpc8610-dma-channel",
					"fsl,eloplus-dma-channel";
				cell-index = <0>;
@@ -241,7 +243,7 @@
				interrupt-parent = <&mpic>;
				interrupts = <20 2>;
			};
			dma-channel@1 {
			dma01: dma-channel@1 {
				compatible = "fsl,mpc8610-dma-channel",
					"fsl,eloplus-dma-channel";
				cell-index = <1>;