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Commit c2fc71c9 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'mtd/for-4.19' of git://git.infradead.org/linux-mtd 

Pull mtd updates from Boris Brezillon:
 "JFFS2 changes:
   - Support 64-bit timestamps

  MTD core changes:
   - Support sub-partitions
   - Clarify mtd_oob_ops documentation
   - Make Kconfig formatting consistent
   - Fix potential overflows in mtdchar_{write,read}()
   - Fallback to ->_{read,write}() when ->_{read,write}_oob() is missing
     and no OOB data were requested
   - Remove VLA usage in the bch lib

  MTD driver changes:
   - Use mtd_device_register() instead of mtd_device_parse_register()
     where applicable
   - Use proper printk format to print physical addresses in the
     solutionengine driver
   - Add missing mtd_set_of_node() call in the powernv driver
   - Remove unneeded variables in a few drivers
   - Plug the TRX part parser to the DT partition parsers logic
   - Check ioremap_cache() return code in the gpio-addr-flash driver
   - Stop using VMLINUX_SYMBOL_STR() in gen_probe.c

  SPI NOR core changes:
   - Apply reset hacks only when reset is explicitly marked as broken in
     the DT

   SPI NOR driver changes:
   - Minor cleanup/fixes in the m25p80 driver
   - Release flash_np in the nxp-spifi driver
   - Add suspend/resume hooks to the atmel-quadspi driver
   - Include gpio/consumer.h instead of gpio.h in the atmel-quadspi
     driver
   - Use %pK instead of %p in the stm32-quadspi driver
   - Improve timeout handling in the cadence-quadspi driver
   - Use mtd_device_register() instead of mtd_device_parse_register() in
     the intel-spi driver

  NAND core changes:
   - Add the SPI-NAND framework.
   - Create a helper to find the best ECC configuration.
   - Create NAND controller operations.
   - Allocate dynamically ONFI parameters structure.
   - Add defines for ONFI version bits.
   - Add manufacturer fixup for ONFI parameter page.
   - Add an option to specify NAND chip as a boot device.
   - Add Reed-Solomon error correction algorithm.
   - Better name for the controller structure.
   - Remove unused caller_is_module() definition.
   - Make subop helpers return unsigned values.
   - Expose _notsupp() helpers for raw page accessors.
   - Add default values for dynamic timings.
   - Kill the chip->scan_bbt() hook.
   - Rename nand_default_bbt() into nand_create_bbt().
   - Start to clean the nand_chip structure.
   - Remove stale prototype from rawnand.h.

  Raw NAND controllers drivers changes:
   - Qcom: structuring cleanup.
   - Denali: use core helper to find the best ECC configuration.
   - Possible build of almost all drivers by adding a dependency on
     COMPILE_TEST for almost all of them in Kconfig, implies various
     fixes, Kconfig cleanup, GPIO headers inclusion cleanup, and even
     changes in sparc64 and ia64 architectures.
   - Clean the ->probe() functions error path of a lot of drivers.
   - Migrate all drivers to use nand_scan() instead of
     nand_scan_ident()/nand_scan_tail() pair.
   - Use mtd_device_register() where applicable to simplify the code.
   - Marvell:
      * Handle on-die ECC.
      * Better clocks handling.
      * Remove bogus comment.
      * Add suspend and resume support.
   - Tegra: add NAND controller driver.
   - Atmel:
      * Add module param to avoid using dma.
      * Drop Wenyou Yang from MAINTAINERS.
   - Denali: optimize timings handling.
   - FSMC: Stop using chip->read_buf().
   - FSL:
      * Switch to SPDX license tag identifiers.
      * Fix qualifiers in MXC init functions.

  Raw NAND chip drivers changes:
   - Micron:
      * Add fixup for ONFI revision.
      * Update ecc_stats.corrected.
      * Make ECC activation stateful.
      * Avoid enabling/disabling ECC when it can't be disabled.
      * Get the actual number of bitflips.
      * Allow forced on-die ECC.
      * Support 8/512 on-die ECC.
      * Fix on-die ECC detection logic.
   - Hynix:
      * Fix decoding the OOB size on H27UCG8T2BTR.
      * Use ->exec_op() in hynix_nand_reg_write_op()"

* tag 'mtd/for-4.19' of git://git.infradead.org/linux-mtd: (188 commits)
  mtd: rawnand: atmel: Select GENERIC_ALLOCATOR
  MAINTAINERS: drop Wenyou Yang from Atmel NAND driver support
  mtd: rawnand: allocate dynamically ONFI parameters during detection
  mtd: spi-nor: only apply reset hacks to broken hardware
  mtd: spi-nor: cadence-quadspi: fix timeout handling
  mtd: spi-nor: atmel-quadspi: Include gpio/consumer.h instead of gpio.h
  mtd: spi-nor: intel-spi: use mtd_device_register()
  mtd: spi-nor: stm32-quadspi: replace "%p" with "%pK"
  mtd: spi-nor: atmel-quadspi: add suspend/resume hooks
  mtd: rawnand: allocate model parameter dynamically
  mtd: rawnand: do not export nand_scan_[ident|tail]() anymore
  mtd: rawnand: txx9ndfmc: convert driver to nand_scan()
  mtd: rawnand: txx9ndfmc: clarify ECC parameters assignation
  mtd: rawnand: tegra: convert driver to nand_scan()
  mtd: rawnand: jz4740: convert driver to nand_scan()
  mtd: rawnand: jz4740: group nand_scan_{ident, tail} calls
  mtd: rawnand: jz4740: fix probe function error path
  mtd: rawnand: docg4: convert driver to nand_scan()
  mtd: rawnand: do not execute nand_scan_ident() if maxchips is zero
  mtd: rawnand: atmel: convert driver to nand_scan()
  ...
parents 57ee3196 9805d4bc

Documentation/devicetree/bindings/mtd/denali-nand.txt

+5 −0
Original line number Diff line number Diff line
@@ -8,6 +8,9 @@ Required properties: 
  - reg : should contain registers location and length for data and reg.

  - reg-names: Should contain the reg names "nand_data" and "denali_reg"

  - interrupts : The interrupt number.

  - clocks: should contain phandle of the controller core clock, the bus

    interface clock, and the ECC circuit clock.

  - clock-names: should contain "nand", "nand_x", "ecc"



Optional properties:

  - nand-ecc-step-size: see nand.txt for details.  If present, the value must be
@@ -31,5 +34,7 @@ nand: nand@ff900000 { 
	compatible = "altr,socfpga-denali-nand";

	reg = <0xff900000 0x20>, <0xffb80000 0x1000>;

	reg-names = "nand_data", "denali_reg";

	clocks = <&nand_clk>, <&nand_x_clk>, <&nand_ecc_clk>;

	clock-names = "nand", "nand_x", "ecc";

	interrupts = <0 144 4>;

};

Documentation/devicetree/bindings/mtd/jedec,spi-nor.txt

+9 −0
Original line number Diff line number Diff line
@@ -69,6 +69,15 @@ Optional properties: 
                   all chips and support for it can not be detected at runtime.

                   Refer to your chips' datasheet to check if this is supported

                   by your chip.

- broken-flash-reset : Some flash devices utilize stateful addressing modes

		   (e.g., for 32-bit addressing) which need to be managed

		   carefully by a system. Because these sorts of flash don't

		   have a standardized software reset command, and because some

		   systems don't toggle the flash RESET# pin upon system reset

		   (if the pin even exists at all), there are systems which

		   cannot reboot properly if the flash is left in the "wrong"

		   state. This boolean flag can be used on such systems, to

		   denote the absence of a reliable reset mechanism.



Example:

Documentation/devicetree/bindings/mtd/nand.txt

+5 −1
Original line number Diff line number Diff line
@@ -25,7 +25,7 @@ Optional NAND chip properties: 
		  Deprecated values:

		  "soft_bch": use "soft" and nand-ecc-algo instead

- nand-ecc-algo: string, algorithm of NAND ECC.

		 Supported values are: "hamming", "bch".

		 Valid values are: "hamming", "bch", "rs".

- nand-bus-width : 8 or 16 bus width if not present 8

- nand-on-flash-bbt: boolean to enable on flash bbt option if not present false
@@ -43,6 +43,10 @@ Optional NAND chip properties: 
		     This is particularly useful when only the in-band area is

		     used by the upper layers, and you want to make your NAND

		     as reliable as possible.

- nand-is-boot-medium: Whether the NAND chip is a boot medium. Drivers might use

		       this information to select ECC algorithms supported by

		       the boot ROM or similar restrictions.



- nand-rb: shall contain the native Ready/Busy ids.



The ECC strength and ECC step size properties define the correction capability

Documentation/devicetree/bindings/mtd/nvidia-tegra20-nand.txt

0 → 100644
+64 −0
Original line number Diff line number Diff line 
NVIDIA Tegra NAND Flash controller



Required properties:

- compatible: Must be one of:

  - "nvidia,tegra20-nand"

- reg: MMIO address range

- interrupts: interrupt output of the NFC controller

- clocks: Must contain an entry for each entry in clock-names.

  See ../clocks/clock-bindings.txt for details.

- clock-names: Must include the following entries:

  - nand

- resets: Must contain an entry for each entry in reset-names.

  See ../reset/reset.txt for details.

- reset-names: Must include the following entries:

  - nand



Optional children nodes:

Individual NAND chips are children of the NAND controller node. Currently

only one NAND chip supported.



Required children node properties:

- reg: An integer ranging from 1 to 6 representing the CS line to use.



Optional children node properties:

- nand-ecc-mode: String, operation mode of the NAND ecc mode. Currently only

		 "hw" is supported.

- nand-ecc-algo: string, algorithm of NAND ECC.

		 Supported values with "hw" ECC mode are: "rs", "bch".

- nand-bus-width : See nand.txt

- nand-on-flash-bbt: See nand.txt

- nand-ecc-strength: integer representing the number of bits to correct

		     per ECC step (always 512). Supported strength using HW ECC

		     modes are:

		     - RS: 4, 6, 8

		     - BCH: 4, 8, 14, 16

- nand-ecc-maximize: See nand.txt

- nand-is-boot-medium: Makes sure only ECC strengths supported by the boot ROM

		       are chosen.

- wp-gpios: GPIO specifier for the write protect pin.



Optional child node of NAND chip nodes:

Partitions: see partition.txt



  Example:

	nand-controller@70008000 {

		compatible = "nvidia,tegra20-nand";

		reg = <0x70008000 0x100>;

		interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&tegra_car TEGRA20_CLK_NDFLASH>;

		clock-names = "nand";

		resets = <&tegra_car 13>;

		reset-names = "nand";



		nand@0 {

			reg = <0>;

			#address-cells = <1>;

			#size-cells = <1>;

			nand-bus-width = <8>;

			nand-on-flash-bbt;

			nand-ecc-algo = "bch";

			nand-ecc-strength = <8>;

			wp-gpios = <&gpio TEGRA_GPIO(S, 0) GPIO_ACTIVE_LOW>;

		};

	};

Documentation/devicetree/bindings/mtd/partition.txt

+46 −0
Original line number Diff line number Diff line
@@ -14,6 +14,13 @@ method is used for a given flash device. To describe the method there should be 
a subnode of the flash device that is named 'partitions'. It must have a

'compatible' property, which is used to identify the method to use.



When a single partition is represented with a DT node (it depends on a used

format) it may also be described using above rules ('compatible' and optionally

some extra properties / subnodes). It allows describing more complex,

hierarchical (multi-level) layouts and should be used if there is some

significant relation between partitions or some partition internally uses

another partitioning method.



Available bindings are listed in the "partitions" subdirectory.
@@ -109,3 +116,42 @@ flash@2 { 
		};

	};

};



flash@3 {

	partitions {

		compatible = "fixed-partitions";

		#address-cells = <1>;

		#size-cells = <1>;



		partition@0 {

			label = "bootloader";

			reg = <0x000000 0x100000>;

			read-only;

		};



		firmware@100000 {

			label = "firmware";

			reg = <0x100000 0xe00000>;

			compatible = "brcm,trx";

		};



		calibration@f00000 {

			label = "calibration";

			reg = <0xf00000 0x100000>;

			compatible = "fixed-partitions";

			ranges = <0 0xf00000 0x100000>;

			#address-cells = <1>;

			#size-cells = <1>;



			partition@0 {

				label = "wifi0";

				reg = <0x000000 0x080000>;

			};



			partition@80000 {

				label = "wifi1";

				reg = <0x080000 0x080000>;

			};

		};

	};

};