Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit c1ebf835 authored by Andi Kleen's avatar Andi Kleen Committed by H. Peter Anvin
Browse files

x86: mce: Rename CONFIG_X86_NEW_MCE to CONFIG_X86_MCE 



Drop the CONFIG_X86_NEW_MCE symbol and change all
references to it to check for CONFIG_X86_MCE directly.

No code changes

Signed-off-by: default avatarAndi Kleen <ak@linux.intel.com>
Signed-off-by: default avatarH. Peter Anvin <hpa@zytor.com>
parent 5bb38adc

arch/x86/Kconfig

+3 −8
Original line number Diff line number Diff line
@@ -781,15 +781,10 @@ config X86_MCE 
	  The action the kernel takes depends on the severity of the problem,

	  ranging from warning messages to halting the machine.



config X86_NEW_MCE

	depends on X86_MCE

	bool

	default y



config X86_MCE_INTEL

	def_bool y

	prompt "Intel MCE features"

	depends on X86_NEW_MCE && X86_LOCAL_APIC

	depends on X86_MCE && X86_LOCAL_APIC

	---help---

	   Additional support for intel specific MCE features such as

	   the thermal monitor.
@@ -797,7 +792,7 @@ config X86_MCE_INTEL 
config X86_MCE_AMD

	def_bool y

	prompt "AMD MCE features"

	depends on X86_NEW_MCE && X86_LOCAL_APIC

	depends on X86_MCE && X86_LOCAL_APIC

	---help---

	   Additional support for AMD specific MCE features such as

	   the DRAM Error Threshold.
@@ -817,7 +812,7 @@ config X86_MCE_THRESHOLD 
	default y



config X86_MCE_INJECT

	depends on X86_NEW_MCE

	depends on X86_MCE

	tristate "Machine check injector support"

	---help---

	  Provide support for injecting machine checks for testing purposes.

arch/x86/include/asm/entry_arch.h

+1 −1
Original line number Diff line number Diff line
@@ -61,7 +61,7 @@ BUILD_INTERRUPT(thermal_interrupt,THERMAL_APIC_VECTOR) 
BUILD_INTERRUPT(threshold_interrupt,THRESHOLD_APIC_VECTOR)

#endif



#ifdef CONFIG_X86_NEW_MCE

#ifdef CONFIG_X86_MCE

BUILD_INTERRUPT(mce_self_interrupt,MCE_SELF_VECTOR)

#endif

arch/x86/kernel/apic/nmi.c

+1 −1
Original line number Diff line number Diff line
@@ -66,7 +66,7 @@ static inline unsigned int get_nmi_count(int cpu) 


static inline int mce_in_progress(void)

{

#if defined(CONFIG_X86_NEW_MCE)

#if defined(CONFIG_X86_MCE)

	return atomic_read(&mce_entry) > 0;

#endif

	return 0;

arch/x86/kernel/cpu/mcheck/Makefile

+1 −2
Original line number Diff line number Diff line 
obj-y				=  mce.o

obj-y				=  mce.o mce-severity.o



obj-$(CONFIG_X86_NEW_MCE)	+= mce-severity.o

obj-$(CONFIG_X86_ANCIENT_MCE)	+= winchip.o p5.o

obj-$(CONFIG_X86_MCE_INTEL)	+= mce_intel.o

obj-$(CONFIG_X86_MCE_AMD)	+= mce_amd.o

arch/x86/kernel/irq.c

+2 −2
Original line number Diff line number Diff line
@@ -104,7 +104,7 @@ static int show_other_interrupts(struct seq_file *p, int prec) 
	seq_printf(p, "  Threshold APIC interrupts\n");

# endif

#endif

#ifdef CONFIG_X86_NEW_MCE

#ifdef CONFIG_X86_MCE

	seq_printf(p, "%*s: ", prec, "MCE");

	for_each_online_cpu(j)

		seq_printf(p, "%10u ", per_cpu(mce_exception_count, j));
@@ -200,7 +200,7 @@ u64 arch_irq_stat_cpu(unsigned int cpu) 
	sum += irq_stats(cpu)->irq_threshold_count;

# endif

#endif

#ifdef CONFIG_X86_NEW_MCE

#ifdef CONFIG_X86_MCE

	sum += per_cpu(mce_exception_count, cpu);

	sum += per_cpu(mce_poll_count, cpu);

#endif