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Commit c0951f0c authored by Chris Wilson's avatar Chris Wilson Committed by Daniel Vetter
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drm/i915: Avoid tweaking RPS before it is enabled 



As we delay the initial RPS enabling (upon boot and after resume), there
is a chance that we may start to render and trigger RPS boosts before we
set up the punit. Any changes we make could result in inconsistent
hardware state, with a danger of causing undefined behaviour. However,
as the boosting is a optional tweak to RPS, we can simply ignore it
whilst RPS is not yet enabled.

Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
Reviewed-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent e147accb

drivers/gpu/drm/i915/i915_drv.h

+1 −0
Original line number Diff line number Diff line
@@ -862,6 +862,7 @@ struct intel_gen6_power_mgmt { 
	int last_adj;

	enum { LOW_POWER, BETWEEN, HIGH_POWER } power;



	bool enabled;

	struct delayed_work delayed_resume_work;



	/*

drivers/gpu/drm/i915/intel_pm.c

+16 −10
Original line number Diff line number Diff line
@@ -3442,22 +3442,26 @@ void gen6_set_rps(struct drm_device *dev, u8 val) 
void gen6_rps_idle(struct drm_i915_private *dev_priv)

{

	mutex_lock(&dev_priv->rps.hw_lock);

	if (dev_priv->rps.enabled) {

		if (dev_priv->info->is_valleyview)

			valleyview_set_rps(dev_priv->dev, dev_priv->rps.min_delay);

		else

			gen6_set_rps(dev_priv->dev, dev_priv->rps.min_delay);

		dev_priv->rps.last_adj = 0;

	}

	mutex_unlock(&dev_priv->rps.hw_lock);

}



void gen6_rps_boost(struct drm_i915_private *dev_priv)

{

	mutex_lock(&dev_priv->rps.hw_lock);

	if (dev_priv->rps.enabled) {

		if (dev_priv->info->is_valleyview)

			valleyview_set_rps(dev_priv->dev, dev_priv->rps.max_delay);

		else

			gen6_set_rps(dev_priv->dev, dev_priv->rps.max_delay);

		dev_priv->rps.last_adj = 0;

	}

	mutex_unlock(&dev_priv->rps.hw_lock);

}
@@ -4716,6 +4720,7 @@ void intel_disable_gt_powersave(struct drm_device *dev) 
			valleyview_disable_rps(dev);

		else

			gen6_disable_rps(dev);

		dev_priv->rps.enabled = false;

		mutex_unlock(&dev_priv->rps.hw_lock);

	}

}
@@ -4735,6 +4740,7 @@ static void intel_gen6_powersave_work(struct work_struct *work) 
		gen6_enable_rps(dev);

		gen6_update_ring_freq(dev);

	}

	dev_priv->rps.enabled = true;

	mutex_unlock(&dev_priv->rps.hw_lock);

}