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Commit c0867fd5 authored by Paul Mackerras's avatar Paul Mackerras Committed by Alexander Graf
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KVM: PPC: Book3S: Add GET/SET_ONE_REG interface for VRSAVE 



The VRSAVE register value for a vcpu is accessible through the
GET/SET_SREGS interface for Book E processors, but not for Book 3S
processors.  In order to make this accessible for Book 3S processors,
this adds a new register identifier for GET/SET_ONE_REG, and adds
the code to implement it.

Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
Signed-off-by: default avatarAlexander Graf <agraf@suse.de>
parent 93b0f4dc

Documentation/virtual/kvm/api.txt

+1 −0
Original line number Diff line number Diff line
@@ -1834,6 +1834,7 @@ registers, find a list below: 
  PPC   | KVM_REG_PPC_TCSCR	| 64

  PPC   | KVM_REG_PPC_PID	| 64

  PPC   | KVM_REG_PPC_ACOP	| 64

  PPC   | KVM_REG_PPC_VRSAVE	| 32

  PPC   | KVM_REG_PPC_TM_GPR0	| 64

          ...

  PPC   | KVM_REG_PPC_TM_GPR31	| 64

arch/powerpc/include/uapi/asm/kvm.h

+2 −0
Original line number Diff line number Diff line
@@ -532,6 +532,8 @@ struct kvm_get_htab_header { 
#define KVM_REG_PPC_PID		(KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xb2)

#define KVM_REG_PPC_ACOP	(KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xb3)



#define KVM_REG_PPC_VRSAVE	(KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xb4)



/* Transactional Memory checkpointed state:

 * This is all GPRs, all VSX regs and a subset of SPRs

 */

arch/powerpc/kvm/book3s.c

+10 −0
Original line number Diff line number Diff line
@@ -528,6 +528,9 @@ int kvm_vcpu_ioctl_get_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg) 
			}

			val = get_reg_val(reg->id, vcpu->arch.vscr.u[3]);

			break;

		case KVM_REG_PPC_VRSAVE:

			val = get_reg_val(reg->id, vcpu->arch.vrsave);

			break;

#endif /* CONFIG_ALTIVEC */

		case KVM_REG_PPC_DEBUG_INST: {

			u32 opcode = INS_TW;
@@ -605,6 +608,13 @@ int kvm_vcpu_ioctl_set_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg) 
			}

			vcpu->arch.vscr.u[3] = set_reg_val(reg->id, val);

			break;

		case KVM_REG_PPC_VRSAVE:

			if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {

				r = -ENXIO;

				break;

			}

			vcpu->arch.vrsave = set_reg_val(reg->id, val);

			break;

#endif /* CONFIG_ALTIVEC */

#ifdef CONFIG_KVM_XICS

		case KVM_REG_PPC_ICP_STATE: