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Commit c0136ef6 authored May 09, 2018 by Yixun Lan Committed by Linus Walleij May 16, 2018

pinctrl: nand: meson-gxl: fix missing data pins



The data pin 0-7 of the NAND controller are actually missing from
the nand pinctrl group, so we fix it here.

Fixes: 0f15f500 ("pinctrl: meson: Add GXL pinctrl definitions")
Reported-by: Liang Yang <liang.yang@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

parent e3678b64

drivers/pinctrl/meson/pinctrl-meson-gxl.c

+2 −2

Original line number	Original line	Diff line number	Diff line
	@@ -617,8 +617,8 @@ static const char * const sdio_groups[] = {
	};		};

	static const char * const nand_groups[] = {		static const char * const nand_groups[] = {
	"nand_ce0", "nand_ce1", "nand_rb0", "nand_ale", "nand_cle",		"emmc_nand_d07", "nand_ce0", "nand_ce1", "nand_rb0", "nand_ale",
	"nand_wen_clk", "nand_ren_wr", "nand_dqs",		"nand_cle", "nand_wen_clk", "nand_ren_wr", "nand_dqs",
	};		};

	static const char * const uart_a_groups[] = {		static const char * const uart_a_groups[] = {