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Commit bfd8ad4e authored by Tim Gore's avatar Tim Gore Committed by Tvrtko Ursulin
Browse files

drm/i915/gen9: implement WaEnableSamplerGPGPUPreemptionSupport 



WaEnableSamplerGPGPUPreemptionSupport fixes a problem
related to mid thread pre-emption.

Signed-off-by: default avatarTim Gore <tim.gore@intel.com>
Reviewed-by: default avatarDave Gordon <david.s.gordon@intel.com>
Signed-off-by: default avatarTvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1461077152-31899-1-git-send-email-tim.gore@intel.com
parent 1034ce70

drivers/gpu/drm/i915/i915_reg.h

+1 −0
Original line number Diff line number Diff line
@@ -7180,6 +7180,7 @@ enum skl_disp_power_wells { 


#define GEN9_HALF_SLICE_CHICKEN7	_MMIO(0xe194)

#define   GEN9_ENABLE_YV12_BUGFIX	(1<<4)

#define   GEN9_ENABLE_GPGPU_PREEMPTION	(1<<2)



/* Audio */

#define G4X_AUD_VID_DID			_MMIO(dev_priv->info.display_mmio_offset + 0x62020)

drivers/gpu/drm/i915/intel_ringbuffer.c

+4 −3
Original line number Diff line number Diff line
@@ -959,9 +959,10 @@ static int gen9_init_workarounds(struct intel_engine_cs *engine) 
	}



	/* WaEnableYV12BugFixInHalfSliceChicken7:skl,bxt */

	if (IS_SKL_REVID(dev, SKL_REVID_C0, REVID_FOREVER) || IS_BROXTON(dev))

	/* WaEnableSamplerGPGPUPreemptionSupport:skl,bxt */

	WA_SET_BIT_MASKED(GEN9_HALF_SLICE_CHICKEN7,

				  GEN9_ENABLE_YV12_BUGFIX);

			  GEN9_ENABLE_YV12_BUGFIX |

			  GEN9_ENABLE_GPGPU_PREEMPTION);



	/* Wa4x4STCOptimizationDisable:skl,bxt */

	/* WaDisablePartialResolveInVc:skl,bxt */