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Commit bfbfa9d6 authored by David Daney's avatar David Daney Committed by Ralf Baechle
Browse files

MIPS: uasm: Add support for LHU. 



The follow-on BPF JIT patches use the LHU instruction, so add it.

Signed-off-by: default avatarDavid Daney <david.daney@cavium.com>
Cc: James Hogan <james.hogan@imgtec.com>
Cc: Alexei Starovoitov <ast@kernel.org>
Cc: Steven J. Hill <steven.hill@cavium.com>
Cc: linux-mips@linux-mips.org
Cc: netdev@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/15743/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 05510f2b

arch/mips/include/asm/uasm.h

+1 −0
Original line number Diff line number Diff line
@@ -138,6 +138,7 @@ Ip_u2s3u1(_lb); 
Ip_u2s3u1(_ld);

Ip_u3u1u2(_ldx);

Ip_u2s3u1(_lh);

Ip_u2s3u1(_lhu);

Ip_u2s3u1(_ll);

Ip_u2s3u1(_lld);

Ip_u1s2(_lui);

arch/mips/mm/uasm-mips.c

+1 −0
Original line number Diff line number Diff line
@@ -103,6 +103,7 @@ static struct insn insn_table[] = { 
	{ insn_ld,  M(ld_op, 0, 0, 0, 0, 0),  RS | RT | SIMM },

	{ insn_ldx, M(spec3_op, 0, 0, 0, ldx_op, lx_op), RS | RT | RD },

	{ insn_lh,  M(lh_op, 0, 0, 0, 0, 0),  RS | RT | SIMM },

	{ insn_lhu,  M(lhu_op, 0, 0, 0, 0, 0),  RS | RT | SIMM },

#ifndef CONFIG_CPU_MIPSR6

	{ insn_lld,  M(lld_op, 0, 0, 0, 0, 0),	RS | RT | SIMM },

	{ insn_ll,  M(ll_op, 0, 0, 0, 0, 0),  RS | RT | SIMM },

arch/mips/mm/uasm.c

+2 −1
Original line number Diff line number Diff line
@@ -61,7 +61,7 @@ enum opcode { 
	insn_sllv, insn_slt, insn_sltiu, insn_sltu, insn_sra, insn_srl,

	insn_srlv, insn_subu, insn_sw, insn_sync, insn_syscall, insn_tlbp,

	insn_tlbr, insn_tlbwi, insn_tlbwr, insn_wait, insn_wsbh, insn_xor,

	insn_xori, insn_yield, insn_lddir, insn_ldpte,

	insn_xori, insn_yield, insn_lddir, insn_ldpte, insn_lhu,

};



struct insn {
@@ -297,6 +297,7 @@ I_u1(_jr) 
I_u2s3u1(_lb)

I_u2s3u1(_ld)

I_u2s3u1(_lh)

I_u2s3u1(_lhu)

I_u2s3u1(_ll)

I_u2s3u1(_lld)

I_u1s2(_lui)