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Commit bf9d99ad authored by cpaul@redhat.com's avatar cpaul@redhat.com Committed by Paulo Zanoni
Browse files

drm/i915/gen9: Make skl_pipe_wm_get_hw_state() reusable 



There's not much of a reason this should have the locations to read out
the hardware state hardcoded, so allow the caller to specify the
location and add this function to intel_drv.h. As well, we're going to
need this function to be reusable for the next patch.

Changes since v1:
- Fix accidental behavior change in the code that Paulo pointed out

Signed-off-by: default avatarLyude <cpaul@redhat.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: default avatarPaulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: default avatarPaulo Zanoni <paulo.r.zanoni@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1476480722-13015-8-git-send-email-cpaul@redhat.com
parent 413fc530

drivers/gpu/drm/i915/intel_drv.h

+2 −0
Original line number Diff line number Diff line
@@ -1764,6 +1764,8 @@ void ilk_wm_get_hw_state(struct drm_device *dev); 
void skl_wm_get_hw_state(struct drm_device *dev);

void skl_ddb_get_hw_state(struct drm_i915_private *dev_priv,

			  struct skl_ddb_allocation *ddb /* out */);

void skl_pipe_wm_get_hw_state(struct drm_crtc *crtc,

			      struct skl_pipe_wm *out);

bool intel_can_enable_sagv(struct drm_atomic_state *state);

int intel_enable_sagv(struct drm_i915_private *dev_priv);

int intel_disable_sagv(struct drm_i915_private *dev_priv);

drivers/gpu/drm/i915/intel_pm.c

+18 −10
Original line number Diff line number Diff line
@@ -4317,15 +4317,13 @@ static inline void skl_wm_level_from_reg_val(uint32_t val, 
		PLANE_WM_LINES_MASK;

}



static void skl_pipe_wm_get_hw_state(struct drm_crtc *crtc)

void skl_pipe_wm_get_hw_state(struct drm_crtc *crtc,

			      struct skl_pipe_wm *out)

{

	struct drm_device *dev = crtc->dev;

	struct drm_i915_private *dev_priv = to_i915(dev);

	struct skl_wm_values *hw = &dev_priv->wm.skl_hw;

	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);

	struct intel_crtc_state *cstate = to_intel_crtc_state(crtc->state);

	struct intel_plane *intel_plane;

	struct skl_pipe_wm *active = &cstate->wm.skl.optimal;

	struct skl_plane_wm *wm;

	enum pipe pipe = intel_crtc->pipe;

	int level, id, max_level;
@@ -4335,7 +4333,7 @@ static void skl_pipe_wm_get_hw_state(struct drm_crtc *crtc) 


	for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) {

		id = skl_wm_plane_id(intel_plane);

		wm = &cstate->wm.skl.optimal.planes[id];

		wm = &out->planes[id];



		for (level = 0; level <= max_level; level++) {

			if (id != PLANE_CURSOR)
@@ -4357,20 +4355,30 @@ static void skl_pipe_wm_get_hw_state(struct drm_crtc *crtc) 
	if (!intel_crtc->active)

		return;



	hw->dirty_pipes |= drm_crtc_mask(crtc);

	active->linetime = I915_READ(PIPE_WM_LINETIME(pipe));

	intel_crtc->wm.active.skl = *active;

	out->linetime = I915_READ(PIPE_WM_LINETIME(pipe));

}



void skl_wm_get_hw_state(struct drm_device *dev)

{

	struct drm_i915_private *dev_priv = to_i915(dev);

	struct skl_wm_values *hw = &dev_priv->wm.skl_hw;

	struct skl_ddb_allocation *ddb = &dev_priv->wm.skl_hw.ddb;

	struct drm_crtc *crtc;

	struct intel_crtc *intel_crtc;

	struct intel_crtc_state *cstate;



	skl_ddb_get_hw_state(dev_priv, ddb);

	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)

		skl_pipe_wm_get_hw_state(crtc);

	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {

		intel_crtc = to_intel_crtc(crtc);

		cstate = to_intel_crtc_state(crtc->state);



		skl_pipe_wm_get_hw_state(crtc, &cstate->wm.skl.optimal);



		if (intel_crtc->active) {

			hw->dirty_pipes |= drm_crtc_mask(crtc);

			intel_crtc->wm.active.skl = cstate->wm.skl.optimal;

		}

	}



	if (dev_priv->active_crtcs) {

		/* Fully recompute DDB on first atomic commit */