Loading qcom/kona-npu.dtsi +2 −1 Original line number Diff line number Diff line Loading @@ -94,7 +94,8 @@ qcom,npubw-devs = <&npu_npu_llcc_bw>, <&npu_llcc_ddr_bw>, <&npudsp_npu_ddr_bw>; qcom,npubw-dev-names = "llcc_bw", "llcc_ddr_bw", "dsp_ddr_bw"; qcom,src-dst-ports = <MSM_BUS_MASTER_NPU MSM_BUS_SLAVE_EBI_CH0>; qcom,src-dst-ports = <MSM_BUS_MASTER_NPU MSM_BUS_SLAVE_EBI_CH0>, <MSM_BUS_MASTER_NPU MSM_BUS_SLAVE_CLK_CTL>; qcom,npu-pwrlevels { #address-cells = <1>; #size-cells = <0>; Loading qcom/lito-npu.dtsi +2 −1 Original line number Diff line number Diff line Loading @@ -86,7 +86,8 @@ #mbox-cells = <2>; qcom,npubw-devs = <&npu_npu_llcc_bw &npu_llcc_ddr_bw &npudsp_npu_ddr_bw>; qcom,npubw-dev-names = "npu_llcc_bw", "llcc_ddr_bw", "dsp_ddr_bw"; qcom,src-dst-ports = <MSM_BUS_MASTER_NPU MSM_BUS_SLAVE_EBI_CH0>; qcom,src-dst-ports = <MSM_BUS_MASTER_NPU MSM_BUS_SLAVE_EBI_CH0>, <MSM_BUS_MASTER_NPU MSM_BUS_SLAVE_CLK_CTL>; qcom,npu-pwrlevels { #address-cells = <1>; #size-cells = <0>; Loading Loading
qcom/kona-npu.dtsi +2 −1 Original line number Diff line number Diff line Loading @@ -94,7 +94,8 @@ qcom,npubw-devs = <&npu_npu_llcc_bw>, <&npu_llcc_ddr_bw>, <&npudsp_npu_ddr_bw>; qcom,npubw-dev-names = "llcc_bw", "llcc_ddr_bw", "dsp_ddr_bw"; qcom,src-dst-ports = <MSM_BUS_MASTER_NPU MSM_BUS_SLAVE_EBI_CH0>; qcom,src-dst-ports = <MSM_BUS_MASTER_NPU MSM_BUS_SLAVE_EBI_CH0>, <MSM_BUS_MASTER_NPU MSM_BUS_SLAVE_CLK_CTL>; qcom,npu-pwrlevels { #address-cells = <1>; #size-cells = <0>; Loading
qcom/lito-npu.dtsi +2 −1 Original line number Diff line number Diff line Loading @@ -86,7 +86,8 @@ #mbox-cells = <2>; qcom,npubw-devs = <&npu_npu_llcc_bw &npu_llcc_ddr_bw &npudsp_npu_ddr_bw>; qcom,npubw-dev-names = "npu_llcc_bw", "llcc_ddr_bw", "dsp_ddr_bw"; qcom,src-dst-ports = <MSM_BUS_MASTER_NPU MSM_BUS_SLAVE_EBI_CH0>; qcom,src-dst-ports = <MSM_BUS_MASTER_NPU MSM_BUS_SLAVE_EBI_CH0>, <MSM_BUS_MASTER_NPU MSM_BUS_SLAVE_CLK_CTL>; qcom,npu-pwrlevels { #address-cells = <1>; #size-cells = <0>; Loading