Commit becaa792 authored Jul 09, 2020 by Vivek Aknurwar Committed by Taniya Das Jul 12, 2020

clk: qcom: gdsc-regulator: Poll PWR_ON during GDSC HW to SW mode switch



While switching from HW to SW control mode, HW may be busy updating
internal required signals. Add a check that polls for PWR_ON status
bit to ensure that the GDSC switches to SW mode before software starts
to use SW mode.

Change-Id: Ie6bd5c5e8c073fb70c696eeb6e911219108f9260
Signed-off-by: Vivek Aknurwar <viveka@codeaurora.org>
Signed-off-by: Taniya Das <tdas@codeaurora.org>

parent 0778c6d8

drivers/clk/qcom/gdsc-regulator.c

+13 −0

Original line number	Diff line number	Diff line
		@@ -577,6 +577,19 @@ static int gdsc_set_mode(struct regulator_dev *rdev, unsigned int mode)
		*/
		gdsc_mb(sc);
		udelay(1);

		/*
		* While switching from HW to SW mode, HW may be busy
		* updating internal required signals. Polling for PWR_ON
		* ensures that the GDSC switches to SW mode before software
		* starts to use SW mode.
		*/
		if (sc->is_gdsc_enabled) {
		ret = poll_gdsc_status(sc, ENABLED);
		if (ret)
		dev_err(&rdev->dev, "%s enable timed out\n",
		sc->rdesc.name);
		}
		break;
		default:
		ret = -EINVAL;