Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit be448a4d authored by Nicolai Hähnle's avatar Nicolai Hähnle Committed by Alex Deucher
Browse files

drm/amdgpu/gfx9: simplify and fix GRBM index selection 



Copy the approach taken by gfx8, which simplifies the code, and set the
instance index properly. The latter is required for debugging, e.g. for
reading wave status by UMR.

Signed-off-by: default avatarNicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent a4f478bc

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

+13 −11
Original line number Original line Diff line number Diff line
@@ -1475,21 +1475,23 @@ static void gfx_v9_0_tiling_mode_table_init(struct amdgpu_device *adev) 




static void gfx_v9_0_select_se_sh(struct amdgpu_device *adev, u32 se_num, u32 sh_num, u32 instance)

static void gfx_v9_0_select_se_sh(struct amdgpu_device *adev, u32 se_num, u32 sh_num, u32 instance)

{

{

	u32 data = REG_SET_FIELD(0, GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES, 1);

	u32 data;





	if ((se_num == 0xffffffff) && (sh_num == 0xffffffff)) {

	if (instance == 0xffffffff)

		data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SH_BROADCAST_WRITES, 1);

		data = REG_SET_FIELD(0, GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES, 1);

		data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SE_BROADCAST_WRITES, 1);

	else

	} else if (se_num == 0xffffffff) {

		data = REG_SET_FIELD(0, GRBM_GFX_INDEX, INSTANCE_INDEX, instance);

		data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SH_INDEX, sh_num);



	if (se_num == 0xffffffff)

		data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SE_BROADCAST_WRITES, 1);

		data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SE_BROADCAST_WRITES, 1);

	} else if (sh_num == 0xffffffff) {

	else

		data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SH_BROADCAST_WRITES, 1);

		data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SE_INDEX, se_num);

		data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SE_INDEX, se_num);

	} else {



	if (sh_num == 0xffffffff)

		data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SH_BROADCAST_WRITES, 1);

	else

		data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SH_INDEX, sh_num);

		data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SH_INDEX, sh_num);

		data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SE_INDEX, se_num);



	}

	WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, data);

	WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, data);

}

}