Merge 96e5bad9 on remote branch

compatible = "qcom,kona-cdp"

compatible = "qcom,kona-qrd"

compatible = "qcom,kona-hdk"

compatible = "qcom,kona-iot"

compatible = "qcom,lito-rumi"

compatible = "qcom,lito-mtp"

compatible = "qcom,lito-cdp"

compatible = "qcom,lito-atp"

compatible = "qcom,lito-qrd"

compatible = "qcom,lagoon-rumi"

compatible = "qcom,lagoon-mtp"

compatible = "qcom,lagoon-cdp"

compatible = "qcom,lagoon-atp"

compatible = "qcom,lagoon-qrd"

compatible = "qcom,bengal-rumi"

compatible = "qcom,bengal-qrd"

compatible = "qcom,bengal-idp"

  - cnss-daemon-support: Boolean property to decide whether cnss_daemon

                         userspace QMI client is supported.

  - use-nv-mac: Boolean property to indicate whether NV MAC is used or not.

  - qcom,set-wlaon-pwr-ctrl: Boolean property to indicate if set

                             WLAON_QFPROM_PWR_CTRL_REG register during power on

                             and off sequences.

Example:

WLAN PD restart notifications.

Required properties:

  - compatible: "qcom,icnss"

  - compatible: "qcom,icnss" for ADRASTEA architecture

                "qcom,wcn6750" for iWCN architecture

  - reg: Memory regions defined as starting address and size

  - reg-names: Names of the memory regions defined in reg entry

  - interrupts: Copy engine interrupt table

Qualcomm Technologies, Inc. CPUFREQ Hardware Debug Trace Bindings

--------------------------------------------------------------------

CPUFREQ Trace provide the support to capture CPUFREQ_HW debug and trace.

CPUFREQ HW debug and trace is used by Qualcomm Technologies, Inc. (QTI)  to

capture trace packets from various clock domains. If applicable trace mode

could be set to periodic or xor. Also, it enables the print for CPUFREQ_HW debug

registers.

Required Properties:

- compatible: shall contain the following:

		"qcom,cpufreq-hw-debug-trace" or "qcom,cpufreq-hw-epss-debug".

- reg: shall contain base register location and length.

- reg-names: shall contain the frequency domain name.

Optional Properties:

- qcom,freq-hw-domain: phandle to the frequency domain device node.

Usage :

The following debug node would get created under qcom-cpufreq-hw directory.

== Trace Enable/Debug ==

- clock_domain_packet_sel

Function:	Set and clear clock domain and trace packet

Input:		echo 1 2 1 > clock_domain_packet_sel (domain 1, packet 2, set)

		echo 1 2 1 > clock_domain_packet_sel (domain 1, packet 2, clear)

- clock_timer

Function:	Enable/Disable Clock Timer

Input:		echo 0 > clk_timer;

		echo 1 > clk_timer;

		cat clk_timer;

- trace_enable

Function:	Enable and disable global trace

Input:		echo 1 > trace_enable

		echo 0 > trace_enable

		cat trace_enable

- trace_type

Function:	Set trace type to XOR or PERIODIC

Input:		echo xor >  trace_type;

		echo periodic >  trace_type;

		cat trace_type;

- print_cpufreq_trace_regs

Function:	Print cpufreq hw trace registers

Input:		cat print_cpufreq_trace_regs

== CPUFREQ-HW Register ==

- print_cpufreq_debug_regs

Function:	Print cpufreq hardware debug registers

Input:		cat print_cpufreq_debug_regs

Example:

	cpufreq_hw_trace: qcom,cpufreq-hw-trace {

		compatible = "qcom,cpufreq-hw-trace";

		reg = <0x18320000 0x800>;

		reg-names = "domain-top";

		qcom,freq-hw-domain = <&cpufreq_hw 0>, <&cpufreq_hw 1>,

					<&cpufreq_hw 2>;

	};

				-- qcom,sde-limit-cases: different usecases to be considered

				-- qcom,sde-limit-ids: respective ids for the above usecases

				-- qcom,sde-limit-values: usecase and value for different combinations

- qcom,sde-mixer-stage-base-layer: A boolean property to indicate if a layer can be staged on base

				stage instead of border fill

Bus Scaling Subnodes:

- qcom,sde-reg-bus:		Property to provide Bus scaling for register access for