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Commit bc36b2aa authored by Anson Huang's avatar Anson Huang Committed by Shawn Guo
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ARM: dts: imx6ul: add GPIO clocks 



i.MX6UL has GPIO clock gates in CCM CCGR, add
clock property for GPIO driver to make sure all
GPIO banks work as expected.

Signed-off-by: default avatarAnson Huang <Anson.Huang@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 4a2eaa8e

arch/arm/boot/dts/imx6ul.dtsi

+5 −0
Original line number Diff line number Diff line
@@ -433,6 +433,7 @@ 
				reg = <0x0209c000 0x4000>;

				interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,

					     <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&clks IMX6UL_CLK_GPIO1>;

				gpio-controller;

				#gpio-cells = <2>;

				interrupt-controller;
@@ -446,6 +447,7 @@ 
				reg = <0x020a0000 0x4000>;

				interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,

					     <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&clks IMX6UL_CLK_GPIO2>;

				gpio-controller;

				#gpio-cells = <2>;

				interrupt-controller;
@@ -458,6 +460,7 @@ 
				reg = <0x020a4000 0x4000>;

				interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,

					     <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&clks IMX6UL_CLK_GPIO3>;

				gpio-controller;

				#gpio-cells = <2>;

				interrupt-controller;
@@ -470,6 +473,7 @@ 
				reg = <0x020a8000 0x4000>;

				interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,

					     <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&clks IMX6UL_CLK_GPIO4>;

				gpio-controller;

				#gpio-cells = <2>;

				interrupt-controller;
@@ -482,6 +486,7 @@ 
				reg = <0x020ac000 0x4000>;

				interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,

					     <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&clks IMX6UL_CLK_GPIO5>;

				gpio-controller;

				#gpio-cells = <2>;

				interrupt-controller;