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Commit bba4a912 authored by Chandan Kumar Jha's avatar Chandan Kumar Jha
Browse files

msm: camera: isp: Ignore other csid irq errors during csid top reset 



During global reset, csi rx irq bits are set since sensor/phy was not
reset properly in last  closure and sending some data. This can lead
to csid fatal or non-fatal errors.

To avoid this condition, ignore other csid irq errors during csid top
reset.

CRs-Fixed: 2585726
Change-Id: I5e09caf3b374407ece8ff1b871c2cf7e0f1837ac
Signed-off-by: default avatarChandan Kumar Jha <cjha@codeaurora.org>
Signed-off-by: default avatarDepeng Shao <depengs@codeaurora.org>
parent 5ef8b141

drivers/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_ife_csid_core.c

+12 −0
Original line number Diff line number Diff line
@@ -3292,6 +3292,8 @@ static int cam_ife_csid_reset_regs( 


	spin_lock_irqsave(&csid_hw->hw_info->hw_lock, flags);



	csid_hw->is_resetting = true;



	/* clear the top interrupt first */

	cam_io_w_mb(1, soc_info->reg_map[0].mem_base +

		csid_reg->cmn_reg->csid_top_irq_clear_addr);
@@ -3355,6 +3357,7 @@ static int cam_ife_csid_reset_regs( 
			rem_jiffies);



end:

	csid_hw->is_resetting = false;

	return rc;

}
@@ -4055,6 +4058,14 @@ irqreturn_t cam_ife_csid_irq(int irq_num, void *data) 
	if (irq_status_top & CSID_TOP_IRQ_DONE) {

		CAM_DBG(CAM_ISP, "csid top reset complete");

		complete(&csid_hw->csid_top_complete);

		csid_hw->is_resetting = false;

		return IRQ_HANDLED;

	}



	if (csid_hw->is_resetting) {

		CAM_DBG(CAM_ISP, "CSID:%d is resetting, IRQ Handling exit",

			csid_hw->hw_intf->hw_idx);

		return IRQ_HANDLED;

	}



	if (irq_status_rx & BIT(csid_reg->csi2_reg->csi2_rst_done_shift_val)) {
@@ -4436,6 +4447,7 @@ int cam_ife_csid_hw_probe_init(struct cam_hw_intf *csid_hw_intf, 




	ife_csid_hw->device_enabled = 0;

	ife_csid_hw->is_resetting = false;

	ife_csid_hw->hw_info->hw_state = CAM_HW_STATE_POWER_DOWN;

	mutex_init(&ife_csid_hw->hw_info->hw_mutex);

	spin_lock_init(&ife_csid_hw->hw_info->hw_lock);

drivers/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_ife_csid_core.h

+2 −0
Original line number Diff line number Diff line
@@ -549,6 +549,7 @@ struct cam_ife_csid_path_cfg { 
 * @clk_rate                  Clock rate

 * @sof_irq_triggered:        Flag is set on receiving event to enable sof irq

 *                            incase of SOF freeze.

 * @is_resetting:             informs whether reset is started or not.

 * @irq_debug_cnt:            Counter to track sof irq's when above flag is set.

 * @error_irq_count           Error IRQ count, if continuous error irq comes

 *                            need to stop the CSID and mask interrupts.
@@ -582,6 +583,7 @@ struct cam_ife_csid_hw { 
	uint64_t                         csid_debug;

	uint64_t                         clk_rate;

	bool                             sof_irq_triggered;

	bool                             is_resetting;

	uint32_t                         irq_debug_cnt;

	uint32_t                         error_irq_count;

	uint32_t                         device_enabled;