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Commit bb522b13 authored by Andy Shevchenko's avatar Andy Shevchenko Committed by Greg Kroah-Hartman
Browse files

platform/x86: pmc_atom: Fix SLP_TYPx bitfield mask 



[ Upstream commit 0a90ed8d0cfa29735a221eba14d9cb6c735d35b6 ]

On Intel hardware the SLP_TYPx bitfield occupies bits 10-12 as per ACPI
specification (see Table 4.13 "PM1 Control Registers Fixed Hardware
Feature Control Bits" for the details).

Fix the mask and other related definitions accordingly.

Fixes: 93e5eadd ("x86/platform: New Intel Atom SOC power management controller driver")
Signed-off-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20220801113734.36131-1-andriy.shevchenko@linux.intel.com


Reviewed-by: default avatarHans de Goede <hdegoede@redhat.com>
Signed-off-by: default avatarHans de Goede <hdegoede@redhat.com>
Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
parent 8e8cdde8

drivers/platform/x86/pmc_atom.c

+1 −1
Original line number Diff line number Diff line
@@ -253,7 +253,7 @@ static void pmc_power_off(void) 
	pm1_cnt_port = acpi_base_addr + PM1_CNT;



	pm1_cnt_value = inl(pm1_cnt_port);

	pm1_cnt_value &= SLEEP_TYPE_MASK;

	pm1_cnt_value &= ~SLEEP_TYPE_MASK;

	pm1_cnt_value |= SLEEP_TYPE_S5;

	pm1_cnt_value |= SLEEP_ENABLE;

include/linux/platform_data/x86/pmc_atom.h

+4 −2
Original line number Diff line number Diff line
@@ -16,6 +16,8 @@ 
#ifndef PMC_ATOM_H

#define PMC_ATOM_H



#include <linux/bits.h>



/* ValleyView Power Control Unit PCI Device ID */

#define	PCI_DEVICE_ID_VLV_PMC	0x0F1C

/* CherryTrail Power Control Unit PCI Device ID */
@@ -148,9 +150,9 @@ 
#define	ACPI_MMIO_REG_LEN	0x100



#define	PM1_CNT			0x4

#define	SLEEP_TYPE_MASK		0xFFFFECFF

#define	SLEEP_TYPE_MASK		GENMASK(12, 10)

#define	SLEEP_TYPE_S5		0x1C00

#define	SLEEP_ENABLE		0x2000

#define	SLEEP_ENABLE		BIT(13)



extern int pmc_atom_read(int offset, u32 *value);

extern int pmc_atom_write(int offset, u32 value);