Loading arch/arm/mach-mx3/Kconfig +10 −0 Original line number Original line Diff line number Diff line Loading @@ -62,6 +62,15 @@ config MACH_MX31_3DS Include support for MX31PDK (3DS) platform. This includes specific Include support for MX31PDK (3DS) platform. This includes specific configurations for the board and its peripherals. configurations for the board and its peripherals. config MACH_MX31_3DS_MXC_NAND_USE_BBT bool "Make the MXC NAND driver use the in flash Bad Block Table" depends on MACH_MX31_3DS depends on MTD_NAND_MXC help Enable this if you want that the MXC NAND driver uses the in flash Bad Block Table to know what blocks are bad instead of scanning the entire flash looking for bad block markers. config MACH_MX31MOBOARD config MACH_MX31MOBOARD bool "Support mx31moboard platforms (EPFL Mobots group)" bool "Support mx31moboard platforms (EPFL Mobots group)" select ARCH_MX31 select ARCH_MX31 Loading Loading @@ -95,6 +104,7 @@ config MACH_PCM043 config MACH_ARMADILLO5X0 config MACH_ARMADILLO5X0 bool "Support Atmark Armadillo-500 Development Base Board" bool "Support Atmark Armadillo-500 Development Base Board" select ARCH_MX31 select ARCH_MX31 select MXC_ULPI if USB_ULPI help help Include support for Atmark Armadillo-500 platform. This includes Include support for Atmark Armadillo-500 platform. This includes specific configurations for the board and its peripherals. specific configurations for the board and its peripherals. Loading arch/arm/mach-mx3/clock-imx31.c +2 −3 Original line number Original line Diff line number Diff line Loading @@ -468,6 +468,7 @@ static struct clk ahb_clk = { } } DEFINE_CLOCK(perclk_clk, 0, NULL, 0, NULL, NULL, &ipg_clk); DEFINE_CLOCK(perclk_clk, 0, NULL, 0, NULL, NULL, &ipg_clk); DEFINE_CLOCK(ckil_clk, 0, NULL, 0, clk_ckil_get_rate, NULL, NULL); DEFINE_CLOCK(sdhc1_clk, 0, MXC_CCM_CGR0, 0, NULL, NULL, &perclk_clk); DEFINE_CLOCK(sdhc1_clk, 0, MXC_CCM_CGR0, 0, NULL, NULL, &perclk_clk); DEFINE_CLOCK(sdhc2_clk, 1, MXC_CCM_CGR0, 2, NULL, NULL, &perclk_clk); DEFINE_CLOCK(sdhc2_clk, 1, MXC_CCM_CGR0, 2, NULL, NULL, &perclk_clk); Loading @@ -490,7 +491,7 @@ DEFINE_CLOCK(mpeg4_clk, 0, MXC_CCM_CGR1, 0, NULL, NULL, &ahb_clk); DEFINE_CLOCK(mstick1_clk, 0, MXC_CCM_CGR1, 2, mstick1_get_rate, NULL, &usb_pll_clk); DEFINE_CLOCK(mstick1_clk, 0, MXC_CCM_CGR1, 2, mstick1_get_rate, NULL, &usb_pll_clk); DEFINE_CLOCK(mstick2_clk, 1, MXC_CCM_CGR1, 4, mstick2_get_rate, NULL, &usb_pll_clk); DEFINE_CLOCK(mstick2_clk, 1, MXC_CCM_CGR1, 4, mstick2_get_rate, NULL, &usb_pll_clk); DEFINE_CLOCK1(csi_clk, 0, MXC_CCM_CGR1, 6, csi, NULL, &serial_pll_clk); DEFINE_CLOCK1(csi_clk, 0, MXC_CCM_CGR1, 6, csi, NULL, &serial_pll_clk); DEFINE_CLOCK(rtc_clk, 0, MXC_CCM_CGR1, 8, NULL, NULL, &ipg_clk); DEFINE_CLOCK(rtc_clk, 0, MXC_CCM_CGR1, 8, NULL, NULL, &ckil_clk); DEFINE_CLOCK(wdog_clk, 0, MXC_CCM_CGR1, 10, NULL, NULL, &ipg_clk); DEFINE_CLOCK(wdog_clk, 0, MXC_CCM_CGR1, 10, NULL, NULL, &ipg_clk); DEFINE_CLOCK(pwm_clk, 0, MXC_CCM_CGR1, 12, NULL, NULL, &perclk_clk); DEFINE_CLOCK(pwm_clk, 0, MXC_CCM_CGR1, 12, NULL, NULL, &perclk_clk); DEFINE_CLOCK(usb_clk2, 0, MXC_CCM_CGR1, 18, usb_get_rate, NULL, &ahb_clk); DEFINE_CLOCK(usb_clk2, 0, MXC_CCM_CGR1, 18, usb_get_rate, NULL, &ahb_clk); Loading @@ -514,7 +515,6 @@ DEFINE_CLOCK(usb_clk1, 0, NULL, 0, usb_get_rate, NULL, &usb_pll_clk) DEFINE_CLOCK(nfc_clk, 0, NULL, 0, nfc_get_rate, NULL, &ahb_clk); DEFINE_CLOCK(nfc_clk, 0, NULL, 0, nfc_get_rate, NULL, &ahb_clk); DEFINE_CLOCK(scc_clk, 0, NULL, 0, NULL, NULL, &ipg_clk); DEFINE_CLOCK(scc_clk, 0, NULL, 0, NULL, NULL, &ipg_clk); DEFINE_CLOCK(ipg_clk, 0, NULL, 0, ipg_get_rate, NULL, &ahb_clk); DEFINE_CLOCK(ipg_clk, 0, NULL, 0, ipg_get_rate, NULL, &ahb_clk); DEFINE_CLOCK(ckil_clk, 0, NULL, 0, clk_ckil_get_rate, NULL, NULL); #define _REGISTER_CLOCK(d, n, c) \ #define _REGISTER_CLOCK(d, n, c) \ { \ { \ Loading Loading @@ -572,7 +572,6 @@ static struct clk_lookup lookups[] = { _REGISTER_CLOCK(NULL, "iim", iim_clk) _REGISTER_CLOCK(NULL, "iim", iim_clk) _REGISTER_CLOCK(NULL, "mpeg4", mpeg4_clk) _REGISTER_CLOCK(NULL, "mpeg4", mpeg4_clk) _REGISTER_CLOCK(NULL, "mbx", mbx_clk) _REGISTER_CLOCK(NULL, "mbx", mbx_clk) _REGISTER_CLOCK("mxc_rtc", NULL, ckil_clk) }; }; int __init mx31_clocks_init(unsigned long fref) int __init mx31_clocks_init(unsigned long fref) Loading arch/arm/mach-mx3/devices.c +18 −1 Original line number Original line Diff line number Diff line Loading @@ -575,11 +575,26 @@ struct platform_device imx_ssi_device1 = { .resource = imx_ssi_resources1, .resource = imx_ssi_resources1, }; }; static int mx3_devices_init(void) static struct resource imx_wdt_resources[] = { { .flags = IORESOURCE_MEM, }, }; struct platform_device imx_wdt_device0 = { .name = "imx-wdt", .id = 0, .num_resources = ARRAY_SIZE(imx_wdt_resources), .resource = imx_wdt_resources, }; static int __init mx3_devices_init(void) { { if (cpu_is_mx31()) { if (cpu_is_mx31()) { mxc_nand_resources[0].start = MX31_NFC_BASE_ADDR; mxc_nand_resources[0].start = MX31_NFC_BASE_ADDR; mxc_nand_resources[0].end = MX31_NFC_BASE_ADDR + 0xfff; mxc_nand_resources[0].end = MX31_NFC_BASE_ADDR + 0xfff; imx_wdt_resources[0].start = MX31_WDOG_BASE_ADDR; imx_wdt_resources[0].end = MX31_WDOG_BASE_ADDR + 0x3fff; mxc_register_device(&mxc_rnga_device, NULL); mxc_register_device(&mxc_rnga_device, NULL); } } if (cpu_is_mx35()) { if (cpu_is_mx35()) { Loading @@ -597,6 +612,8 @@ static int mx3_devices_init(void) imx_ssi_resources0[1].end = MX35_INT_SSI1; imx_ssi_resources0[1].end = MX35_INT_SSI1; imx_ssi_resources1[1].start = MX35_INT_SSI2; imx_ssi_resources1[1].start = MX35_INT_SSI2; imx_ssi_resources1[1].end = MX35_INT_SSI2; imx_ssi_resources1[1].end = MX35_INT_SSI2; imx_wdt_resources[0].start = MX35_WDOG_BASE_ADDR; imx_wdt_resources[0].end = MX35_WDOG_BASE_ADDR + 0x3fff; } } return 0; return 0; Loading arch/arm/mach-mx3/devices.h +2 −1 Original line number Original line Diff line number Diff line Loading @@ -25,4 +25,5 @@ extern struct platform_device mxc_spi_device1; extern struct platform_device mxc_spi_device2; extern struct platform_device mxc_spi_device2; extern struct platform_device imx_ssi_device0; extern struct platform_device imx_ssi_device0; extern struct platform_device imx_ssi_device1; extern struct platform_device imx_ssi_device1; extern struct platform_device imx_ssi_device1; extern struct platform_device imx_wdt_device0; arch/arm/mach-mx3/mach-armadillo5x0.c +166 −0 Original line number Original line Diff line number Diff line Loading @@ -36,6 +36,9 @@ #include <linux/input.h> #include <linux/input.h> #include <linux/gpio_keys.h> #include <linux/gpio_keys.h> #include <linux/i2c.h> #include <linux/i2c.h> #include <linux/usb/otg.h> #include <linux/usb/ulpi.h> #include <linux/delay.h> #include <mach/hardware.h> #include <mach/hardware.h> #include <asm/mach-types.h> #include <asm/mach-types.h> Loading @@ -52,6 +55,8 @@ #include <mach/ipu.h> #include <mach/ipu.h> #include <mach/mx3fb.h> #include <mach/mx3fb.h> #include <mach/mxc_nand.h> #include <mach/mxc_nand.h> #include <mach/mxc_ehci.h> #include <mach/ulpi.h> #include "devices.h" #include "devices.h" #include "crm_regs.h" #include "crm_regs.h" Loading Loading @@ -103,8 +108,158 @@ static int armadillo5x0_pins[] = { /* I2C2 */ /* I2C2 */ MX31_PIN_CSPI2_MOSI__SCL, MX31_PIN_CSPI2_MOSI__SCL, MX31_PIN_CSPI2_MISO__SDA, MX31_PIN_CSPI2_MISO__SDA, /* OTG */ MX31_PIN_USBOTG_DATA0__USBOTG_DATA0, MX31_PIN_USBOTG_DATA1__USBOTG_DATA1, MX31_PIN_USBOTG_DATA2__USBOTG_DATA2, MX31_PIN_USBOTG_DATA3__USBOTG_DATA3, MX31_PIN_USBOTG_DATA4__USBOTG_DATA4, MX31_PIN_USBOTG_DATA5__USBOTG_DATA5, MX31_PIN_USBOTG_DATA6__USBOTG_DATA6, MX31_PIN_USBOTG_DATA7__USBOTG_DATA7, MX31_PIN_USBOTG_CLK__USBOTG_CLK, MX31_PIN_USBOTG_DIR__USBOTG_DIR, MX31_PIN_USBOTG_NXT__USBOTG_NXT, MX31_PIN_USBOTG_STP__USBOTG_STP, /* USB host 2 */ IOMUX_MODE(MX31_PIN_USBH2_CLK, IOMUX_CONFIG_FUNC), IOMUX_MODE(MX31_PIN_USBH2_DIR, IOMUX_CONFIG_FUNC), IOMUX_MODE(MX31_PIN_USBH2_NXT, IOMUX_CONFIG_FUNC), IOMUX_MODE(MX31_PIN_USBH2_STP, IOMUX_CONFIG_FUNC), IOMUX_MODE(MX31_PIN_USBH2_DATA0, IOMUX_CONFIG_FUNC), IOMUX_MODE(MX31_PIN_USBH2_DATA1, IOMUX_CONFIG_FUNC), IOMUX_MODE(MX31_PIN_STXD3, IOMUX_CONFIG_FUNC), IOMUX_MODE(MX31_PIN_SRXD3, IOMUX_CONFIG_FUNC), IOMUX_MODE(MX31_PIN_SCK3, IOMUX_CONFIG_FUNC), IOMUX_MODE(MX31_PIN_SFS3, IOMUX_CONFIG_FUNC), IOMUX_MODE(MX31_PIN_STXD6, IOMUX_CONFIG_FUNC), IOMUX_MODE(MX31_PIN_SRXD6, IOMUX_CONFIG_FUNC), }; }; /* USB */ #if defined(CONFIG_USB_ULPI) #define OTG_RESET IOMUX_TO_GPIO(MX31_PIN_STXD4) #define USBH2_RESET IOMUX_TO_GPIO(MX31_PIN_SCK6) #define USBH2_CS IOMUX_TO_GPIO(MX31_PIN_GPIO1_3) #define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \ PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU) static int usbotg_init(struct platform_device *pdev) { int err; mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG); mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG); mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG); mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG); mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG); mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG); mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG); mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG); mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG); mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG); mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG); mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG); /* Chip already enabled by hardware */ /* OTG phy reset*/ err = gpio_request(OTG_RESET, "USB-OTG-RESET"); if (err) { pr_err("Failed to request the usb otg reset gpio\n"); return err; } err = gpio_direction_output(OTG_RESET, 1/*HIGH*/); if (err) { pr_err("Failed to reset the usb otg phy\n"); goto otg_free_reset; } gpio_set_value(OTG_RESET, 0/*LOW*/); mdelay(5); gpio_set_value(OTG_RESET, 1/*HIGH*/); return 0; otg_free_reset: gpio_free(OTG_RESET); return err; } static int usbh2_init(struct platform_device *pdev) { int err; mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG); mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG); mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG); mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG); mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG); mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG); mxc_iomux_set_pad(MX31_PIN_SRXD6, USB_PAD_CFG); mxc_iomux_set_pad(MX31_PIN_STXD6, USB_PAD_CFG); mxc_iomux_set_pad(MX31_PIN_SFS3, USB_PAD_CFG); mxc_iomux_set_pad(MX31_PIN_SCK3, USB_PAD_CFG); mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG); mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG); mxc_iomux_set_gpr(MUX_PGP_UH2, true); /* Enable the chip */ err = gpio_request(USBH2_CS, "USB-H2-CS"); if (err) { pr_err("Failed to request the usb host 2 CS gpio\n"); return err; } err = gpio_direction_output(USBH2_CS, 0/*Enabled*/); if (err) { pr_err("Failed to drive the usb host 2 CS gpio\n"); goto h2_free_cs; } /* H2 phy reset*/ err = gpio_request(USBH2_RESET, "USB-H2-RESET"); if (err) { pr_err("Failed to request the usb host 2 reset gpio\n"); goto h2_free_cs; } err = gpio_direction_output(USBH2_RESET, 1/*HIGH*/); if (err) { pr_err("Failed to reset the usb host 2 phy\n"); goto h2_free_reset; } gpio_set_value(USBH2_RESET, 0/*LOW*/); mdelay(5); gpio_set_value(USBH2_RESET, 1/*HIGH*/); return 0; h2_free_reset: gpio_free(USBH2_RESET); h2_free_cs: gpio_free(USBH2_CS); return err; } static struct mxc_usbh_platform_data usbotg_pdata = { .init = usbotg_init, .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT, .flags = MXC_EHCI_POWER_PINS_ENABLED | MXC_EHCI_INTERFACE_DIFF_UNI, }; static struct mxc_usbh_platform_data usbh2_pdata = { .init = usbh2_init, .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT, .flags = MXC_EHCI_POWER_PINS_ENABLED | MXC_EHCI_INTERFACE_DIFF_UNI, }; #endif /* CONFIG_USB_ULPI */ /* RTC over I2C*/ /* RTC over I2C*/ #define ARMADILLO5X0_RTC_GPIO IOMUX_TO_GPIO(MX31_PIN_SRXD4) #define ARMADILLO5X0_RTC_GPIO IOMUX_TO_GPIO(MX31_PIN_SRXD4) Loading Loading @@ -393,6 +548,17 @@ static void __init armadillo5x0_init(void) if (armadillo5x0_i2c_rtc.irq == 0) if (armadillo5x0_i2c_rtc.irq == 0) pr_warning("armadillo5x0_init: failed to get RTC IRQ\n"); pr_warning("armadillo5x0_init: failed to get RTC IRQ\n"); i2c_register_board_info(1, &armadillo5x0_i2c_rtc, 1); i2c_register_board_info(1, &armadillo5x0_i2c_rtc, 1); /* USB */ #if defined(CONFIG_USB_ULPI) usbotg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT); usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT); mxc_register_device(&mxc_otg_host, &usbotg_pdata); mxc_register_device(&mxc_usbh2, &usbh2_pdata); #endif } } static void __init armadillo5x0_timer_init(void) static void __init armadillo5x0_timer_init(void) Loading Loading
arch/arm/mach-mx3/Kconfig +10 −0 Original line number Original line Diff line number Diff line Loading @@ -62,6 +62,15 @@ config MACH_MX31_3DS Include support for MX31PDK (3DS) platform. This includes specific Include support for MX31PDK (3DS) platform. This includes specific configurations for the board and its peripherals. configurations for the board and its peripherals. config MACH_MX31_3DS_MXC_NAND_USE_BBT bool "Make the MXC NAND driver use the in flash Bad Block Table" depends on MACH_MX31_3DS depends on MTD_NAND_MXC help Enable this if you want that the MXC NAND driver uses the in flash Bad Block Table to know what blocks are bad instead of scanning the entire flash looking for bad block markers. config MACH_MX31MOBOARD config MACH_MX31MOBOARD bool "Support mx31moboard platforms (EPFL Mobots group)" bool "Support mx31moboard platforms (EPFL Mobots group)" select ARCH_MX31 select ARCH_MX31 Loading Loading @@ -95,6 +104,7 @@ config MACH_PCM043 config MACH_ARMADILLO5X0 config MACH_ARMADILLO5X0 bool "Support Atmark Armadillo-500 Development Base Board" bool "Support Atmark Armadillo-500 Development Base Board" select ARCH_MX31 select ARCH_MX31 select MXC_ULPI if USB_ULPI help help Include support for Atmark Armadillo-500 platform. This includes Include support for Atmark Armadillo-500 platform. This includes specific configurations for the board and its peripherals. specific configurations for the board and its peripherals. Loading
arch/arm/mach-mx3/clock-imx31.c +2 −3 Original line number Original line Diff line number Diff line Loading @@ -468,6 +468,7 @@ static struct clk ahb_clk = { } } DEFINE_CLOCK(perclk_clk, 0, NULL, 0, NULL, NULL, &ipg_clk); DEFINE_CLOCK(perclk_clk, 0, NULL, 0, NULL, NULL, &ipg_clk); DEFINE_CLOCK(ckil_clk, 0, NULL, 0, clk_ckil_get_rate, NULL, NULL); DEFINE_CLOCK(sdhc1_clk, 0, MXC_CCM_CGR0, 0, NULL, NULL, &perclk_clk); DEFINE_CLOCK(sdhc1_clk, 0, MXC_CCM_CGR0, 0, NULL, NULL, &perclk_clk); DEFINE_CLOCK(sdhc2_clk, 1, MXC_CCM_CGR0, 2, NULL, NULL, &perclk_clk); DEFINE_CLOCK(sdhc2_clk, 1, MXC_CCM_CGR0, 2, NULL, NULL, &perclk_clk); Loading @@ -490,7 +491,7 @@ DEFINE_CLOCK(mpeg4_clk, 0, MXC_CCM_CGR1, 0, NULL, NULL, &ahb_clk); DEFINE_CLOCK(mstick1_clk, 0, MXC_CCM_CGR1, 2, mstick1_get_rate, NULL, &usb_pll_clk); DEFINE_CLOCK(mstick1_clk, 0, MXC_CCM_CGR1, 2, mstick1_get_rate, NULL, &usb_pll_clk); DEFINE_CLOCK(mstick2_clk, 1, MXC_CCM_CGR1, 4, mstick2_get_rate, NULL, &usb_pll_clk); DEFINE_CLOCK(mstick2_clk, 1, MXC_CCM_CGR1, 4, mstick2_get_rate, NULL, &usb_pll_clk); DEFINE_CLOCK1(csi_clk, 0, MXC_CCM_CGR1, 6, csi, NULL, &serial_pll_clk); DEFINE_CLOCK1(csi_clk, 0, MXC_CCM_CGR1, 6, csi, NULL, &serial_pll_clk); DEFINE_CLOCK(rtc_clk, 0, MXC_CCM_CGR1, 8, NULL, NULL, &ipg_clk); DEFINE_CLOCK(rtc_clk, 0, MXC_CCM_CGR1, 8, NULL, NULL, &ckil_clk); DEFINE_CLOCK(wdog_clk, 0, MXC_CCM_CGR1, 10, NULL, NULL, &ipg_clk); DEFINE_CLOCK(wdog_clk, 0, MXC_CCM_CGR1, 10, NULL, NULL, &ipg_clk); DEFINE_CLOCK(pwm_clk, 0, MXC_CCM_CGR1, 12, NULL, NULL, &perclk_clk); DEFINE_CLOCK(pwm_clk, 0, MXC_CCM_CGR1, 12, NULL, NULL, &perclk_clk); DEFINE_CLOCK(usb_clk2, 0, MXC_CCM_CGR1, 18, usb_get_rate, NULL, &ahb_clk); DEFINE_CLOCK(usb_clk2, 0, MXC_CCM_CGR1, 18, usb_get_rate, NULL, &ahb_clk); Loading @@ -514,7 +515,6 @@ DEFINE_CLOCK(usb_clk1, 0, NULL, 0, usb_get_rate, NULL, &usb_pll_clk) DEFINE_CLOCK(nfc_clk, 0, NULL, 0, nfc_get_rate, NULL, &ahb_clk); DEFINE_CLOCK(nfc_clk, 0, NULL, 0, nfc_get_rate, NULL, &ahb_clk); DEFINE_CLOCK(scc_clk, 0, NULL, 0, NULL, NULL, &ipg_clk); DEFINE_CLOCK(scc_clk, 0, NULL, 0, NULL, NULL, &ipg_clk); DEFINE_CLOCK(ipg_clk, 0, NULL, 0, ipg_get_rate, NULL, &ahb_clk); DEFINE_CLOCK(ipg_clk, 0, NULL, 0, ipg_get_rate, NULL, &ahb_clk); DEFINE_CLOCK(ckil_clk, 0, NULL, 0, clk_ckil_get_rate, NULL, NULL); #define _REGISTER_CLOCK(d, n, c) \ #define _REGISTER_CLOCK(d, n, c) \ { \ { \ Loading Loading @@ -572,7 +572,6 @@ static struct clk_lookup lookups[] = { _REGISTER_CLOCK(NULL, "iim", iim_clk) _REGISTER_CLOCK(NULL, "iim", iim_clk) _REGISTER_CLOCK(NULL, "mpeg4", mpeg4_clk) _REGISTER_CLOCK(NULL, "mpeg4", mpeg4_clk) _REGISTER_CLOCK(NULL, "mbx", mbx_clk) _REGISTER_CLOCK(NULL, "mbx", mbx_clk) _REGISTER_CLOCK("mxc_rtc", NULL, ckil_clk) }; }; int __init mx31_clocks_init(unsigned long fref) int __init mx31_clocks_init(unsigned long fref) Loading
arch/arm/mach-mx3/devices.c +18 −1 Original line number Original line Diff line number Diff line Loading @@ -575,11 +575,26 @@ struct platform_device imx_ssi_device1 = { .resource = imx_ssi_resources1, .resource = imx_ssi_resources1, }; }; static int mx3_devices_init(void) static struct resource imx_wdt_resources[] = { { .flags = IORESOURCE_MEM, }, }; struct platform_device imx_wdt_device0 = { .name = "imx-wdt", .id = 0, .num_resources = ARRAY_SIZE(imx_wdt_resources), .resource = imx_wdt_resources, }; static int __init mx3_devices_init(void) { { if (cpu_is_mx31()) { if (cpu_is_mx31()) { mxc_nand_resources[0].start = MX31_NFC_BASE_ADDR; mxc_nand_resources[0].start = MX31_NFC_BASE_ADDR; mxc_nand_resources[0].end = MX31_NFC_BASE_ADDR + 0xfff; mxc_nand_resources[0].end = MX31_NFC_BASE_ADDR + 0xfff; imx_wdt_resources[0].start = MX31_WDOG_BASE_ADDR; imx_wdt_resources[0].end = MX31_WDOG_BASE_ADDR + 0x3fff; mxc_register_device(&mxc_rnga_device, NULL); mxc_register_device(&mxc_rnga_device, NULL); } } if (cpu_is_mx35()) { if (cpu_is_mx35()) { Loading @@ -597,6 +612,8 @@ static int mx3_devices_init(void) imx_ssi_resources0[1].end = MX35_INT_SSI1; imx_ssi_resources0[1].end = MX35_INT_SSI1; imx_ssi_resources1[1].start = MX35_INT_SSI2; imx_ssi_resources1[1].start = MX35_INT_SSI2; imx_ssi_resources1[1].end = MX35_INT_SSI2; imx_ssi_resources1[1].end = MX35_INT_SSI2; imx_wdt_resources[0].start = MX35_WDOG_BASE_ADDR; imx_wdt_resources[0].end = MX35_WDOG_BASE_ADDR + 0x3fff; } } return 0; return 0; Loading
arch/arm/mach-mx3/devices.h +2 −1 Original line number Original line Diff line number Diff line Loading @@ -25,4 +25,5 @@ extern struct platform_device mxc_spi_device1; extern struct platform_device mxc_spi_device2; extern struct platform_device mxc_spi_device2; extern struct platform_device imx_ssi_device0; extern struct platform_device imx_ssi_device0; extern struct platform_device imx_ssi_device1; extern struct platform_device imx_ssi_device1; extern struct platform_device imx_ssi_device1; extern struct platform_device imx_wdt_device0;
arch/arm/mach-mx3/mach-armadillo5x0.c +166 −0 Original line number Original line Diff line number Diff line Loading @@ -36,6 +36,9 @@ #include <linux/input.h> #include <linux/input.h> #include <linux/gpio_keys.h> #include <linux/gpio_keys.h> #include <linux/i2c.h> #include <linux/i2c.h> #include <linux/usb/otg.h> #include <linux/usb/ulpi.h> #include <linux/delay.h> #include <mach/hardware.h> #include <mach/hardware.h> #include <asm/mach-types.h> #include <asm/mach-types.h> Loading @@ -52,6 +55,8 @@ #include <mach/ipu.h> #include <mach/ipu.h> #include <mach/mx3fb.h> #include <mach/mx3fb.h> #include <mach/mxc_nand.h> #include <mach/mxc_nand.h> #include <mach/mxc_ehci.h> #include <mach/ulpi.h> #include "devices.h" #include "devices.h" #include "crm_regs.h" #include "crm_regs.h" Loading Loading @@ -103,8 +108,158 @@ static int armadillo5x0_pins[] = { /* I2C2 */ /* I2C2 */ MX31_PIN_CSPI2_MOSI__SCL, MX31_PIN_CSPI2_MOSI__SCL, MX31_PIN_CSPI2_MISO__SDA, MX31_PIN_CSPI2_MISO__SDA, /* OTG */ MX31_PIN_USBOTG_DATA0__USBOTG_DATA0, MX31_PIN_USBOTG_DATA1__USBOTG_DATA1, MX31_PIN_USBOTG_DATA2__USBOTG_DATA2, MX31_PIN_USBOTG_DATA3__USBOTG_DATA3, MX31_PIN_USBOTG_DATA4__USBOTG_DATA4, MX31_PIN_USBOTG_DATA5__USBOTG_DATA5, MX31_PIN_USBOTG_DATA6__USBOTG_DATA6, MX31_PIN_USBOTG_DATA7__USBOTG_DATA7, MX31_PIN_USBOTG_CLK__USBOTG_CLK, MX31_PIN_USBOTG_DIR__USBOTG_DIR, MX31_PIN_USBOTG_NXT__USBOTG_NXT, MX31_PIN_USBOTG_STP__USBOTG_STP, /* USB host 2 */ IOMUX_MODE(MX31_PIN_USBH2_CLK, IOMUX_CONFIG_FUNC), IOMUX_MODE(MX31_PIN_USBH2_DIR, IOMUX_CONFIG_FUNC), IOMUX_MODE(MX31_PIN_USBH2_NXT, IOMUX_CONFIG_FUNC), IOMUX_MODE(MX31_PIN_USBH2_STP, IOMUX_CONFIG_FUNC), IOMUX_MODE(MX31_PIN_USBH2_DATA0, IOMUX_CONFIG_FUNC), IOMUX_MODE(MX31_PIN_USBH2_DATA1, IOMUX_CONFIG_FUNC), IOMUX_MODE(MX31_PIN_STXD3, IOMUX_CONFIG_FUNC), IOMUX_MODE(MX31_PIN_SRXD3, IOMUX_CONFIG_FUNC), IOMUX_MODE(MX31_PIN_SCK3, IOMUX_CONFIG_FUNC), IOMUX_MODE(MX31_PIN_SFS3, IOMUX_CONFIG_FUNC), IOMUX_MODE(MX31_PIN_STXD6, IOMUX_CONFIG_FUNC), IOMUX_MODE(MX31_PIN_SRXD6, IOMUX_CONFIG_FUNC), }; }; /* USB */ #if defined(CONFIG_USB_ULPI) #define OTG_RESET IOMUX_TO_GPIO(MX31_PIN_STXD4) #define USBH2_RESET IOMUX_TO_GPIO(MX31_PIN_SCK6) #define USBH2_CS IOMUX_TO_GPIO(MX31_PIN_GPIO1_3) #define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \ PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU) static int usbotg_init(struct platform_device *pdev) { int err; mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG); mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG); mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG); mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG); mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG); mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG); mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG); mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG); mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG); mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG); mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG); mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG); /* Chip already enabled by hardware */ /* OTG phy reset*/ err = gpio_request(OTG_RESET, "USB-OTG-RESET"); if (err) { pr_err("Failed to request the usb otg reset gpio\n"); return err; } err = gpio_direction_output(OTG_RESET, 1/*HIGH*/); if (err) { pr_err("Failed to reset the usb otg phy\n"); goto otg_free_reset; } gpio_set_value(OTG_RESET, 0/*LOW*/); mdelay(5); gpio_set_value(OTG_RESET, 1/*HIGH*/); return 0; otg_free_reset: gpio_free(OTG_RESET); return err; } static int usbh2_init(struct platform_device *pdev) { int err; mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG); mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG); mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG); mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG); mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG); mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG); mxc_iomux_set_pad(MX31_PIN_SRXD6, USB_PAD_CFG); mxc_iomux_set_pad(MX31_PIN_STXD6, USB_PAD_CFG); mxc_iomux_set_pad(MX31_PIN_SFS3, USB_PAD_CFG); mxc_iomux_set_pad(MX31_PIN_SCK3, USB_PAD_CFG); mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG); mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG); mxc_iomux_set_gpr(MUX_PGP_UH2, true); /* Enable the chip */ err = gpio_request(USBH2_CS, "USB-H2-CS"); if (err) { pr_err("Failed to request the usb host 2 CS gpio\n"); return err; } err = gpio_direction_output(USBH2_CS, 0/*Enabled*/); if (err) { pr_err("Failed to drive the usb host 2 CS gpio\n"); goto h2_free_cs; } /* H2 phy reset*/ err = gpio_request(USBH2_RESET, "USB-H2-RESET"); if (err) { pr_err("Failed to request the usb host 2 reset gpio\n"); goto h2_free_cs; } err = gpio_direction_output(USBH2_RESET, 1/*HIGH*/); if (err) { pr_err("Failed to reset the usb host 2 phy\n"); goto h2_free_reset; } gpio_set_value(USBH2_RESET, 0/*LOW*/); mdelay(5); gpio_set_value(USBH2_RESET, 1/*HIGH*/); return 0; h2_free_reset: gpio_free(USBH2_RESET); h2_free_cs: gpio_free(USBH2_CS); return err; } static struct mxc_usbh_platform_data usbotg_pdata = { .init = usbotg_init, .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT, .flags = MXC_EHCI_POWER_PINS_ENABLED | MXC_EHCI_INTERFACE_DIFF_UNI, }; static struct mxc_usbh_platform_data usbh2_pdata = { .init = usbh2_init, .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT, .flags = MXC_EHCI_POWER_PINS_ENABLED | MXC_EHCI_INTERFACE_DIFF_UNI, }; #endif /* CONFIG_USB_ULPI */ /* RTC over I2C*/ /* RTC over I2C*/ #define ARMADILLO5X0_RTC_GPIO IOMUX_TO_GPIO(MX31_PIN_SRXD4) #define ARMADILLO5X0_RTC_GPIO IOMUX_TO_GPIO(MX31_PIN_SRXD4) Loading Loading @@ -393,6 +548,17 @@ static void __init armadillo5x0_init(void) if (armadillo5x0_i2c_rtc.irq == 0) if (armadillo5x0_i2c_rtc.irq == 0) pr_warning("armadillo5x0_init: failed to get RTC IRQ\n"); pr_warning("armadillo5x0_init: failed to get RTC IRQ\n"); i2c_register_board_info(1, &armadillo5x0_i2c_rtc, 1); i2c_register_board_info(1, &armadillo5x0_i2c_rtc, 1); /* USB */ #if defined(CONFIG_USB_ULPI) usbotg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT); usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT); mxc_register_device(&mxc_otg_host, &usbotg_pdata); mxc_register_device(&mxc_usbh2, &usbh2_pdata); #endif } } static void __init armadillo5x0_timer_init(void) static void __init armadillo5x0_timer_init(void) Loading