Merge branch 'lpc32xx/fixup' of...

CONFIG_EXPERIMENTAL=y

CONFIG_SYSVIPC=y

CONFIG_IKCONFIG=y

CONFIG_IKCONFIG_PROC=y

CONFIG_LOG_BUF_SHIFT=14

CONFIG_SYSFS_DEPRECATED=y

CONFIG_SYSFS_DEPRECATED_V2=y

CONFIG_BLK_DEV_INITRD=y

CONFIG_CC_OPTIMIZE_FOR_SIZE=y

CONFIG_SYSCTL_SYSCALL=y

CONFIG_EMBEDDED=y

CONFIG_SLAB=y

CONFIG_MODULES=y

CONFIG_MODULE_UNLOAD=y

# CONFIG_BLK_DEV_BSG is not set

CONFIG_PARTITION_ADVANCED=y

CONFIG_ARCH_LPC32XX=y

CONFIG_NO_HZ=y

CONFIG_HIGH_RES_TIMERS=y

CONFIG_PREEMPT=y

CONFIG_AEABI=y

CONFIG_ZBOOT_ROM_TEXT=0x0

CONFIG_ZBOOT_ROM_BSS=0x0

CONFIG_CMDLINE="console=ttyS0,115200n81 root=/dev/ram0"

CONFIG_CPU_IDLE=y

CONFIG_FPE_NWFPE=y

CONFIG_VFP=y

# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set

CONFIG_BINFMT_AOUT=y

CONFIG_NET=y

CONFIG_PACKET=y

CONFIG_UNIX=y

CONFIG_INET=y

CONFIG_IP_MULTICAST=y

CONFIG_IP_PNP=y

CONFIG_IP_PNP_DHCP=y

CONFIG_IP_PNP_BOOTP=y

# CONFIG_INET_XFRM_MODE_TRANSPORT is not set

# CONFIG_INET_XFRM_MODE_TUNNEL is not set

# CONFIG_INET_XFRM_MODE_BEET is not set

# CONFIG_INET_LRO is not set

# CONFIG_INET_DIAG is not set

# CONFIG_IPV6 is not set

# CONFIG_WIRELESS is not set

CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"

# CONFIG_FW_LOADER is not set

CONFIG_MTD=y

CONFIG_MTD_CMDLINE_PARTS=y

CONFIG_MTD_CHAR=y

CONFIG_MTD_BLOCK=y

CONFIG_MTD_NAND=y

CONFIG_MTD_NAND_MUSEUM_IDS=y

CONFIG_BLK_DEV_LOOP=y

CONFIG_BLK_DEV_CRYPTOLOOP=y

CONFIG_BLK_DEV_RAM=y

CONFIG_BLK_DEV_RAM_COUNT=1

CONFIG_BLK_DEV_RAM_SIZE=16384

CONFIG_MISC_DEVICES=y

CONFIG_EEPROM_AT25=y

CONFIG_SCSI=y

CONFIG_BLK_DEV_SD=y

CONFIG_NETDEVICES=y

CONFIG_MII=y

CONFIG_PHYLIB=y

CONFIG_SMSC_PHY=y

# CONFIG_WLAN is not set

# CONFIG_INPUT_MOUSEDEV_PSAUX is not set

CONFIG_INPUT_MOUSEDEV_SCREEN_X=240

CONFIG_INPUT_MOUSEDEV_SCREEN_Y=320

CONFIG_INPUT_EVDEV=y

# CONFIG_INPUT_MOUSE is not set

CONFIG_INPUT_TOUCHSCREEN=y

CONFIG_TOUCHSCREEN_LPC32XX=y

# CONFIG_LEGACY_PTYS is not set

CONFIG_SERIAL_8250=y

CONFIG_SERIAL_8250_CONSOLE=y

# CONFIG_HW_RANDOM is not set

CONFIG_I2C=y

CONFIG_I2C_CHARDEV=y

CONFIG_I2C_PNX=y

CONFIG_SPI=y

CONFIG_SPI_PL022=y

CONFIG_GPIO_SYSFS=y

# CONFIG_HWMON is not set

CONFIG_WATCHDOG=y

CONFIG_PNX4008_WATCHDOG=y

CONFIG_FB=y

CONFIG_FB_ARMCLCD=y

CONFIG_FRAMEBUFFER_CONSOLE=y

CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y

CONFIG_LOGO=y

# CONFIG_LOGO_LINUX_MONO is not set

# CONFIG_LOGO_LINUX_VGA16 is not set

CONFIG_SOUND=y

CONFIG_SND=y

CONFIG_SND_SEQUENCER=y

CONFIG_SND_MIXER_OSS=y

CONFIG_SND_PCM_OSS=y

CONFIG_SND_SEQUENCER_OSS=y

CONFIG_SND_DYNAMIC_MINORS=y

# CONFIG_SND_VERBOSE_PROCFS is not set

# CONFIG_SND_DRIVERS is not set

# CONFIG_SND_ARM is not set

# CONFIG_SND_SPI is not set

CONFIG_SND_SOC=y

# CONFIG_HID_SUPPORT is not set

CONFIG_USB=y

CONFIG_USB_STORAGE=y

CONFIG_USB_LIBUSUAL=y

CONFIG_MMC=y

# CONFIG_MMC_BLOCK_BOUNCE is not set

CONFIG_MMC_ARMMMCI=y

CONFIG_NEW_LEDS=y

CONFIG_LEDS_CLASS=y

CONFIG_LEDS_GPIO=y

CONFIG_LEDS_TRIGGERS=y

CONFIG_LEDS_TRIGGER_HEARTBEAT=y

CONFIG_RTC_CLASS=y

CONFIG_RTC_INTF_DEV_UIE_EMUL=y

CONFIG_RTC_DRV_LPC32XX=y

CONFIG_EXT2_FS=y

CONFIG_AUTOFS4_FS=y

CONFIG_MSDOS_FS=y

CONFIG_VFAT_FS=y

CONFIG_TMPFS=y

CONFIG_JFFS2_FS=y

CONFIG_JFFS2_FS_WBUF_VERIFY=y

CONFIG_CRAMFS=y

CONFIG_NFS_FS=y

CONFIG_NFS_V3=y

CONFIG_ROOT_NFS=y

CONFIG_NLS_CODEPAGE_437=y

CONFIG_NLS_ASCII=y

CONFIG_NLS_ISO8859_1=y

CONFIG_NLS_UTF8=y

# CONFIG_SCHED_DEBUG is not set

# CONFIG_DEBUG_PREEMPT is not set

CONFIG_DEBUG_INFO=y

# CONFIG_FTRACE is not set

# CONFIG_ARM_UNWIND is not set

CONFIG_DEBUG_LL=y

CONFIG_EARLY_PRINTK=y

CONFIG_CRYPTO_ANSI_CPRNG=y

# CONFIG_CRYPTO_HW is not set

CONFIG_CRC_CCITT=y

 *   will also impact the individual peripheral rates.

 */

#include <linux/export.h>

#include <linux/kernel.h>

#include <linux/list.h>

#include <linux/errno.h>

#include "clock.h"

#include "common.h"

static DEFINE_SPINLOCK(global_clkregs_lock);

static struct clk clk_armpll;

static struct clk clk_usbpll;

static DEFINE_MUTEX(clkm_lock);

/*

 * Post divider values for PLLs based on selected register value

static int local_pll397_enable(struct clk *clk, int enable)

{

	u32 reg;

	unsigned long timeout = 1 + msecs_to_jiffies(10);

	unsigned long timeout = jiffies + msecs_to_jiffies(10);

	reg = __raw_readl(LPC32XX_CLKPWR_PLL397_CTRL);

		/* Wait for PLL397 lock */

		while (((__raw_readl(LPC32XX_CLKPWR_PLL397_CTRL) &

			LPC32XX_CLKPWR_SYSCTRL_PLL397_STS) == 0) &&

			(timeout > jiffies))

			time_before(jiffies, timeout))

			cpu_relax();

		if ((__raw_readl(LPC32XX_CLKPWR_PLL397_CTRL) &

static int local_oscmain_enable(struct clk *clk, int enable)

{

	u32 reg;

	unsigned long timeout = 1 + msecs_to_jiffies(10);

	unsigned long timeout = jiffies + msecs_to_jiffies(10);

	reg = __raw_readl(LPC32XX_CLKPWR_MAIN_OSC_CTRL);

		/* Wait for main oscillator to start */

		while (((__raw_readl(LPC32XX_CLKPWR_MAIN_OSC_CTRL) &

			LPC32XX_CLKPWR_MOSC_DISABLE) != 0) &&

			(timeout > jiffies))

			time_before(jiffies, timeout))

			cpu_relax();

		if ((__raw_readl(LPC32XX_CLKPWR_MAIN_OSC_CTRL) &

{

	u32 reg;

	int ret = -ENODEV;

	unsigned long timeout = 1 + msecs_to_jiffies(10);

	unsigned long timeout = jiffies + msecs_to_jiffies(10);

	reg = __raw_readl(LPC32XX_CLKPWR_USB_CTRL);

		__raw_writel(reg, LPC32XX_CLKPWR_USB_CTRL);

		/* Wait for PLL lock */

		while ((timeout > jiffies) & (ret == -ENODEV)) {

		while (time_before(jiffies, timeout) && (ret == -ENODEV)) {

			reg = __raw_readl(LPC32XX_CLKPWR_USB_CTRL);

			if (reg & LPC32XX_CLKPWR_USBCTRL_PLL_STS)

				ret = 0;

	.enable_mask	= LPC32XX_CLKPWR_LCDCTRL_CLK_EN,

};

static inline void clk_lock(void)

{

	mutex_lock(&clkm_lock);

}

static inline void clk_unlock(void)

{

	mutex_unlock(&clkm_lock);

}

static void local_clk_disable(struct clk *clk)

{

	WARN_ON(clk->usecount == 0);

	/* Don't attempt to disable clock if it has no users */

	if (clk->usecount > 0) {

		clk->usecount--;

int clk_enable(struct clk *clk)

{

	int ret;

	unsigned long flags;

	clk_lock();

	spin_lock_irqsave(&global_clkregs_lock, flags);

	ret = local_clk_enable(clk);

	clk_unlock();

	spin_unlock_irqrestore(&global_clkregs_lock, flags);

	return ret;

}

 */

void clk_disable(struct clk *clk)

{

	clk_lock();

	unsigned long flags;

	spin_lock_irqsave(&global_clkregs_lock, flags);

	local_clk_disable(clk);

	clk_unlock();

	spin_unlock_irqrestore(&global_clkregs_lock, flags);

}

EXPORT_SYMBOL(clk_disable);

 */

unsigned long clk_get_rate(struct clk *clk)

{

	unsigned long rate;

	clk_lock();

	rate = clk->get_rate(clk);

	clk_unlock();

	return rate;

	return clk->get_rate(clk);

}

EXPORT_SYMBOL(clk_get_rate);

	 * the actual rate set as part of the peripheral dividers

	 * instead of high level clock control

	 */

	if (clk->set_rate) {

		clk_lock();

	if (clk->set_rate)

		ret = clk->set_rate(clk, rate);

		clk_unlock();

	}

	return ret;

}

 */

long clk_round_rate(struct clk *clk, unsigned long rate)

{

	clk_lock();

	if (clk->round_rate)

		rate = clk->round_rate(clk, rate);

	else

		rate = clk->get_rate(clk);

	clk_unlock();

	return rate;

}

EXPORT_SYMBOL(clk_round_rate);

	_REGISTER_CLOCK("dev:ssp1", NULL, clk_ssp1)

	_REGISTER_CLOCK("lpc32xx_keys.0", NULL, clk_kscan)

	_REGISTER_CLOCK("lpc32xx-nand.0", "nand_ck", clk_nand)

	_REGISTER_CLOCK("tbd", "i2s0_ck", clk_i2s0)

	_REGISTER_CLOCK("tbd", "i2s1_ck", clk_i2s1)

	_REGISTER_CLOCK(NULL, "i2s0_ck", clk_i2s0)

	_REGISTER_CLOCK(NULL, "i2s1_ck", clk_i2s1)

	_REGISTER_CLOCK("ts-lpc32xx", NULL, clk_tsc)

	_REGISTER_CLOCK("dev:mmc0", "MCLK", clk_mmc)

	_REGISTER_CLOCK("dev:mmc0", NULL, clk_mmc)

	_REGISTER_CLOCK("lpc-net.0", NULL, clk_net)

	_REGISTER_CLOCK("dev:clcd", NULL, clk_lcd)

	_REGISTER_CLOCK("lpc32xx_udc", "ck_usbd", clk_usbd)

 */

extern void lpc32xx_get_uid(u32 devid[4]);

extern void lpc32xx_watchdog_reset(void);

extern u32 lpc32xx_return_iram_size(void);

/*

};

static struct platform_device *phy3250_devs[] __initdata = {

	&lpc32xx_rtc_device,

	&lpc32xx_tsc_device,

	&lpc32xx_i2c0_device,

	&lpc32xx_i2c1_device,

	&lpc32xx_i2c2_device,