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Commit baa9a93a authored by Rafael J. Wysocki's avatar Rafael J. Wysocki
Browse files

Merge branch 'cpuidle' of git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux into pm-cpuidle

Pull intel_idle material for v4.1 from Len Brown.

* 'cpuidle' of git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux:
  intel_idle: Add support for the Airmont Core in the Cherrytrail and Braswell SOCs
  intel_idle: Update support for Silvermont Core in Baytrail SOC
parents d5cdc3c4 cab07a56
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+55 −11
Original line number Diff line number Diff line
@@ -217,19 +217,11 @@ static struct cpuidle_state byt_cstates[] = {
		.target_residency = 1,
		.enter = &intel_idle,
		.enter_freeze = intel_idle_freeze, },
	{
		.name = "C1E-BYT",
		.desc = "MWAIT 0x01",
		.flags = MWAIT2flg(0x01),
		.exit_latency = 15,
		.target_residency = 30,
		.enter = &intel_idle,
		.enter_freeze = intel_idle_freeze, },
	{
		.name = "C6N-BYT",
		.desc = "MWAIT 0x58",
		.flags = MWAIT2flg(0x58) | CPUIDLE_FLAG_TLB_FLUSHED,
		.exit_latency = 40,
		.exit_latency = 300,
		.target_residency = 275,
		.enter = &intel_idle,
		.enter_freeze = intel_idle_freeze, },
@@ -237,7 +229,7 @@ static struct cpuidle_state byt_cstates[] = {
		.name = "C6S-BYT",
		.desc = "MWAIT 0x52",
		.flags = MWAIT2flg(0x52) | CPUIDLE_FLAG_TLB_FLUSHED,
		.exit_latency = 140,
		.exit_latency = 500,
		.target_residency = 560,
		.enter = &intel_idle,
		.enter_freeze = intel_idle_freeze, },
@@ -246,7 +238,7 @@ static struct cpuidle_state byt_cstates[] = {
		.desc = "MWAIT 0x60",
		.flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TLB_FLUSHED,
		.exit_latency = 1200,
		.target_residency = 1500,
		.target_residency = 4000,
		.enter = &intel_idle,
		.enter_freeze = intel_idle_freeze, },
	{
@@ -261,6 +253,51 @@ static struct cpuidle_state byt_cstates[] = {
		.enter = NULL }
};

static struct cpuidle_state cht_cstates[] = {
	{
		.name = "C1-CHT",
		.desc = "MWAIT 0x00",
		.flags = MWAIT2flg(0x00),
		.exit_latency = 1,
		.target_residency = 1,
		.enter = &intel_idle,
		.enter_freeze = intel_idle_freeze, },
	{
		.name = "C6N-CHT",
		.desc = "MWAIT 0x58",
		.flags = MWAIT2flg(0x58) | CPUIDLE_FLAG_TLB_FLUSHED,
		.exit_latency = 80,
		.target_residency = 275,
		.enter = &intel_idle,
		.enter_freeze = intel_idle_freeze, },
	{
		.name = "C6S-CHT",
		.desc = "MWAIT 0x52",
		.flags = MWAIT2flg(0x52) | CPUIDLE_FLAG_TLB_FLUSHED,
		.exit_latency = 200,
		.target_residency = 560,
		.enter = &intel_idle,
		.enter_freeze = intel_idle_freeze, },
	{
		.name = "C7-CHT",
		.desc = "MWAIT 0x60",
		.flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TLB_FLUSHED,
		.exit_latency = 1200,
		.target_residency = 4000,
		.enter = &intel_idle,
		.enter_freeze = intel_idle_freeze, },
	{
		.name = "C7S-CHT",
		.desc = "MWAIT 0x64",
		.flags = MWAIT2flg(0x64) | CPUIDLE_FLAG_TLB_FLUSHED,
		.exit_latency = 10000,
		.target_residency = 20000,
		.enter = &intel_idle,
		.enter_freeze = intel_idle_freeze, },
	{
		.enter = NULL }
};

static struct cpuidle_state ivb_cstates[] = {
	{
		.name = "C1-IVB",
@@ -748,6 +785,12 @@ static const struct idle_cpu idle_cpu_byt = {
	.byt_auto_demotion_disable_flag = true,
};

static const struct idle_cpu idle_cpu_cht = {
	.state_table = cht_cstates,
	.disable_promotion_to_c1e = true,
	.byt_auto_demotion_disable_flag = true,
};

static const struct idle_cpu idle_cpu_ivb = {
	.state_table = ivb_cstates,
	.disable_promotion_to_c1e = true,
@@ -790,6 +833,7 @@ static const struct x86_cpu_id intel_idle_ids[] __initconst = {
	ICPU(0x2d, idle_cpu_snb),
	ICPU(0x36, idle_cpu_atom),
	ICPU(0x37, idle_cpu_byt),
	ICPU(0x4c, idle_cpu_cht),
	ICPU(0x3a, idle_cpu_ivb),
	ICPU(0x3e, idle_cpu_ivt),
	ICPU(0x3c, idle_cpu_hsw),