Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit ba678231 authored by Zhigang Lu's avatar Zhigang Lu Committed by Chris Metcalf
Browse files

tile: Enable NMIs on return from handle_nmi() without errors 



NMI interrupts mask ALL interrupts before calling the handler,
so we need to unmask NMIs according to the value handle_nmi() returns.
If it returns zero, the NMIs should be re-enabled; if it returns
a non-zero error, the NMIs should be disabled.

Signed-off-by: default avatarZhigang Lu <zlu@tilera.com>
Signed-off-by: default avatarChris Metcalf <cmetcalf@tilera.com>
parent 8e3441eb

arch/tile/kernel/intvec_32.S

+11 −0
Original line number Diff line number Diff line
@@ -946,6 +946,13 @@ STD_ENTRY(interrupt_return) 
	bzt     r30, .Lrestore_regs

3:



	/* We are relying on INT_PERF_COUNT at 33, and AUX_PERF_COUNT at 48 */

	{

	 moveli r0, lo16(1 << (INT_PERF_COUNT - 32))

	 bz     r31, .Lrestore_regs

	}

	auli    r0, r0, ha16(1 << (INT_AUX_PERF_COUNT - 32))

	mtspr   SPR_INTERRUPT_MASK_RESET_K_1, r0



	/*

	 * We now commit to returning from this interrupt, since we will be
@@ -1171,6 +1178,10 @@ handle_nmi: 
	 PTREGS_PTR(r0, PTREGS_OFFSET_BASE)

	}

	FEEDBACK_REENTER(handle_nmi)

	{

	 movei  r30, 1

	 seq    r31, r0, zero

	}

	j       interrupt_return

	STD_ENDPROC(handle_nmi)

arch/tile/kernel/intvec_64.S

+10 −1
Original line number Diff line number Diff line
@@ -971,6 +971,15 @@ STD_ENTRY(interrupt_return) 
	beqzt   r30, .Lrestore_regs

3:



#if INT_PERF_COUNT + 1 != INT_AUX_PERF_COUNT

# error Bad interrupt assumption

#endif

	{

	 movei  r0, 3   /* two adjacent bits for the PERF_COUNT mask */

	 beqz   r31, .Lrestore_regs

	}

	shli    r0, r0, INT_PERF_COUNT

	mtspr   SPR_INTERRUPT_MASK_RESET_K, r0



	/*

	 * We now commit to returning from this interrupt, since we will be
@@ -1187,7 +1196,7 @@ handle_nmi: 
	FEEDBACK_REENTER(handle_nmi)

	{

	 movei  r30, 1

	 move   r31, r0

	 cmpeq  r31, r0, zero

	}

	j       interrupt_return

	STD_ENDPROC(handle_nmi)