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Commit b9edbce9 authored by Sergei Shtylyov's avatar Sergei Shtylyov Committed by Simon Horman
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arm64: dts: renesas: initial Condor board device tree 



Add the initial device  tree for  the R8A77980 SoC based Condor board.
The board has 1 debug serial port (SCIF0); include support for it, so
that the serial console can work.

Based on the original (and large) patch by Vladimir Barinov.

Signed-off-by: default avatarVladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: default avatarSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
[simon: correct memory size to 0x78000000 (2GiB)]
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent bf6f9083

arch/arm64/boot/dts/renesas/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -8,4 +8,5 @@ dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-x.dtb r8a7796-m3ulcb.dtb 
dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-m3ulcb-kf.dtb

dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-xs.dtb

dtb-$(CONFIG_ARCH_R8A77970) += r8a77970-eagle.dtb r8a77970-v3msk.dtb

dtb-$(CONFIG_ARCH_R8A77980) += r8a77980-condor.dtb

dtb-$(CONFIG_ARCH_R8A77995) += r8a77995-draak.dtb

arch/arm64/boot/dts/renesas/r8a77980-condor.dts

0 → 100644
+45 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0

/*

 * Device Tree Source for the Condor board

 *

 * Copyright (C) 2018 Renesas Electronics Corp.

 * Copyright (C) 2018 Cogent Embedded, Inc.

 */



/dts-v1/;

#include "r8a77980.dtsi"



/ {

	model = "Renesas Condor board based on r8a77980";

	compatible = "renesas,condor", "renesas,r8a77980";



	aliases {

		serial0 = &scif0;

	};



	chosen {

		stdout-path = "serial0:115200n8";

	};



	memory@48000000 {

		device_type = "memory";

		/* first 128MB is reserved for secure area. */

		reg = <0 0x48000000 0 0x78000000>;

	};

};



&extal_clk {

	clock-frequency = <16666666>;

};



&extalr_clk {

	clock-frequency = <32768>;

};



&scif0 {

	status = "okay";

};



&scif_clk {

	clock-frequency = <14745600>;

};