Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit b859e7d1 authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull spi updates from Mark Brown:
 "Not a huge amount going on this release, mainly new drivers (there's a
  couple more waiting that didn't quite make the cut for this release
  too):

   - An interface for querying if the current transfer is the last in a
     message, allowing controllers that need special handling for the
     final transfer to use the core message parsing.
   - Support for Amlogic Meson SPIFC, Imagination Technologies SFPI,
     Intel Quark X1000 and Samsung Exynos 7 controllers"

* tag 'spi-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (38 commits)
  spi/s3c64xx: Remove redundant runtime PM management
  spi: fsl-spi: remove unused variable assignment
  spi: spi-fsl-spi: Return an error code in fsl_spi_do_one_msg()
  spi: core: Do not mangle error code from kthread_run()
  spi: fsl-espi: add (un)prepare_transfer_hardware calls to save power if SPI is not in use
  spi: fsl-(e)spi: migrate to generic master queueing
  spi/txx9: Deletion of an unnecessary check before the function call "clk_disable"
  spi: cadence: Fix 3-to-8 mux mode
  spi: cadence: Init HW after reading devicetree attributes
  spi: meson: Select REGMAP_MMIO
  spi: s3c64xx: add support for exynos7 SPI controller
  spi: spi-pxa2xx: SPI support for Intel Quark X1000
  spi: meson: meson_spifc_setup_speed() can be static
  spi: spi-pxa2xx: Add helpers for regiseters' accessing
  spi: spi-mxs: Fix mapping from vmalloc-ed buffer to scatter list
  spi: atmel: introduce probe deferring
  spi: atmel: remove compat for non DT board when requesting dma chan
  spi: meson: Add support for Amlogic Meson SPIFC
  spi: meson: Add device tree bindings documentation for SPIFC
  spi: core: Add spi_transfer_is_last() helper
  ...
parents 709d9f09 0e647037
Loading
Loading
Loading
Loading
+4 −2
Original line number Diff line number Diff line
@@ -8,8 +8,10 @@ Required properties:
 - gpio-sck: GPIO spec for the SCK line to use
 - gpio-miso: GPIO spec for the MISO line to use
 - gpio-mosi: GPIO spec for the MOSI line to use
 - cs-gpios: GPIOs to use for chipselect lines
 - num-chipselects: number of chipselect lines
 - cs-gpios: GPIOs to use for chipselect lines.
             Not needed if num-chipselects = <0>.
 - num-chipselects: Number of chipselect lines. Should be <0> if a single device
                    with no chip select is connected.

Example:

+37 −0
Original line number Diff line number Diff line
IMG Synchronous Peripheral Flash Interface (SPFI) controller

Required properties:
- compatible: Must be "img,spfi".
- reg: Must contain the base address and length of the SPFI registers.
- interrupts: Must contain the SPFI interrupt.
- clocks: Must contain an entry for each entry in clock-names.
  See ../clock/clock-bindings.txt for details.
- clock-names: Must include the following entries:
  - spfi: SPI operating clock
  - sys: SPI system interface clock
- dmas: Must contain an entry for each entry in dma-names.
  See ../dma/dma.txt for details.
- dma-names: Must include the following entries:
  - rx
  - tx
- #address-cells: Must be 1.
- #size-cells: Must be 0.

Optional properties:
- img,supports-quad-mode: Should be set if the interface supports quad mode
  SPI transfers.

Example:

spi@18100f00 {
	compatible = "img,spfi";
	reg = <0x18100f00 0x100>;
	interrupts = <GIC_SHARED 22 IRQ_TYPE_LEVEL_HIGH>;
	clocks = <&spi_clk>, <&system_clk>;
	clock-names = "spfi", "sys";
	dmas = <&mdc 9 0xffffffff 0>, <&mdc 10 0xffffffff 0>;
	dma-names = "rx", "tx";

	#address-cells = <1>;
	#size-cells = <0>;
};
+22 −0
Original line number Diff line number Diff line
Amlogic Meson SPI controllers

* SPIFC (SPI Flash Controller)

The Meson SPIFC is a controller optimized for communication with SPI
NOR memories, without DMA support and a 64-byte unified transmit /
receive buffer.

Required properties:
 - compatible: should be "amlogic,meson6-spifc"
 - reg: physical base address and length of the controller registers
 - clocks: phandle of the input clock for the baud rate generator
 - #address-cells: should be 1
 - #size-cells: should be 0

	spi@c1108c80 {
		compatible = "amlogic,meson6-spifc";
		reg = <0xc1108c80 0x80>;
		clocks = <&clk81>;
		#address-cells = <1>;
		#size-cells = <0>;
	};
+1 −1
Original line number Diff line number Diff line
@@ -9,7 +9,7 @@ Required SoC Specific Properties:
    - samsung,s3c2443-spi: for s3c2443, s3c2416 and s3c2450 platforms
    - samsung,s3c6410-spi: for s3c6410 platforms
    - samsung,s5pv210-spi: for s5pv210 and s5pc110 platforms
    - samsung,exynos4210-spi: for exynos4 and exynos5 platforms
    - samsung,exynos7-spi: for exynos7 platforms

- reg: physical base address of the controller and length of memory mapped
  region.
+16 −1
Original line number Diff line number Diff line
@@ -225,6 +225,13 @@ config SPI_GPIO
	  GPIO operations, you should be able to leverage that for better
	  speed with a custom version of this driver; see the source code.

config SPI_IMG_SPFI
	tristate "IMG SPFI controller"
	depends on MIPS || COMPILE_TEST
	help
	  This enables support for the SPFI master controller found on
	  IMG SoCs.

config SPI_IMX
	tristate "Freescale i.MX SPI controllers"
	depends on ARCH_MXC || COMPILE_TEST
@@ -301,6 +308,14 @@ config SPI_FSL_ESPI
	  From MPC8536, 85xx platform uses the controller, and all P10xx,
	  P20xx, P30xx,P40xx, P50xx uses this controller.

config SPI_MESON_SPIFC
	tristate "Amlogic Meson SPIFC controller"
	depends on ARCH_MESON || COMPILE_TEST
	select REGMAP_MMIO
	help
	  This enables master mode support for the SPIFC (SPI flash
	  controller) available in Amlogic Meson SoCs.

config SPI_OC_TINY
	tristate "OpenCores tiny SPI"
	depends on GPIOLIB
@@ -444,7 +459,7 @@ config SPI_S3C24XX_FIQ

config SPI_S3C64XX
	tristate "Samsung S3C64XX series type SPI"
	depends on PLAT_SAMSUNG
	depends on (PLAT_SAMSUNG || ARCH_EXYNOS)
	select S3C64XX_PL080 if ARCH_S3C64XX
	help
	  SPI driver for Samsung S3C64XX and newer SoCs.
Loading