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Commit b84628eb authored by Senthil Balasubramanian's avatar Senthil Balasubramanian Committed by John W. Linville
Browse files

ath9k: Add power save wrappers and modularize hw_pll handler



We should protect hw_pll handler with power save wrappers and
also modularize hw_pll handler properly for better readability.

Also add a debug message to track chip resets on pll hang condition.

Signed-off-by: default avatarSenthil Balasubramanian <senthilkumar@atheros.com>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent 9eab61c2
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+1 −1
Original line number Diff line number Diff line
@@ -673,7 +673,7 @@ static void ath9k_hw_init_qos(struct ath_hw *ah)
	REGWRITE_BUFFER_FLUSH(ah);
}

unsigned long ar9003_get_pll_sqsum_dvc(struct ath_hw *ah)
u32 ar9003_get_pll_sqsum_dvc(struct ath_hw *ah)
{
	REG_CLR_BIT(ah, PLL3, PLL3_DO_MEAS_MASK);
	udelay(100);
+1 −1
Original line number Diff line number Diff line
@@ -932,7 +932,7 @@ void ath9k_hw_settsf64(struct ath_hw *ah, u64 tsf64);
void ath9k_hw_reset_tsf(struct ath_hw *ah);
void ath9k_hw_set_tsfadjust(struct ath_hw *ah, u32 setting);
void ath9k_hw_init_global_settings(struct ath_hw *ah);
unsigned long ar9003_get_pll_sqsum_dvc(struct ath_hw *ah);
u32 ar9003_get_pll_sqsum_dvc(struct ath_hw *ah);
void ath9k_hw_set11nmac2040(struct ath_hw *ah);
void ath9k_hw_beaconinit(struct ath_hw *ah, u32 next_beacon, u32 beacon_period);
void ath9k_hw_set_sta_beacon_timers(struct ath_hw *ah,
+24 −10
Original line number Diff line number Diff line
@@ -624,23 +624,37 @@ void ath_hw_check(struct work_struct *work)
	ath9k_ps_restore(sc);
}

void ath_hw_pll_work(struct work_struct *work)
static void ath_hw_pll_rx_hang_check(struct ath_softc *sc, u32 pll_sqsum)
{
	struct ath_softc *sc = container_of(work, struct ath_softc,
					    hw_pll_work.work);
	static int count;
	struct ath_common *common = ath9k_hw_common(sc->sc_ah);

	if (AR_SREV_9485(sc->sc_ah)) {
		if (ar9003_get_pll_sqsum_dvc(sc->sc_ah) >= 0x40000) {
	if (pll_sqsum >= 0x40000) {
		count++;

		if (count == 3) {
			/* Rx is hung for more than 500ms. Reset it */
			ath_dbg(common, ATH_DBG_RESET,
				"Possible RX hang, resetting");
			ath_reset(sc, true);
			count = 0;
		}
	} else
		count = 0;
}

void ath_hw_pll_work(struct work_struct *work)
{
	struct ath_softc *sc = container_of(work, struct ath_softc,
					    hw_pll_work.work);
	u32 pll_sqsum;

	if (AR_SREV_9485(sc->sc_ah)) {

		ath9k_ps_wakeup(sc);
		pll_sqsum = ar9003_get_pll_sqsum_dvc(sc->sc_ah);
		ath9k_ps_restore(sc);

		ath_hw_pll_rx_hang_check(sc, pll_sqsum);

		ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/5);
	}