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Commit b7ed5161 authored by Wills Wang's avatar Wills Wang Committed by Greg Kroah-Hartman
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sc16is7xx: fix incorrect register bits macro



In datasheet, Modem Status Register MSR[4-7] reflect the modem pins
CTS/DSR/RI/CD signal state.

Signed-off-by: default avatarWills Wang <wills.wang@live.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent b78cd169
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+6 −6
Original line number Diff line number Diff line
@@ -196,14 +196,14 @@
						  * or (IO6)
						  * - only on 75x/76x
						  */
#define SC16IS7XX_MSR_CTS_BIT		(1 << 0) /* CTS */
#define SC16IS7XX_MSR_DSR_BIT		(1 << 1) /* DSR (IO4)
#define SC16IS7XX_MSR_CTS_BIT		(1 << 4) /* CTS */
#define SC16IS7XX_MSR_DSR_BIT		(1 << 5) /* DSR (IO4)
						  * - only on 75x/76x
						  */
#define SC16IS7XX_MSR_RI_BIT		(1 << 2) /* RI (IO7)
#define SC16IS7XX_MSR_RI_BIT		(1 << 6) /* RI (IO7)
						  * - only on 75x/76x
						  */
#define SC16IS7XX_MSR_CD_BIT		(1 << 3) /* CD (IO6)
#define SC16IS7XX_MSR_CD_BIT		(1 << 7) /* CD (IO6)
						  * - only on 75x/76x
						  */
#define SC16IS7XX_MSR_DELTA_MASK	0x0F     /* Any of the delta bits! */
@@ -240,7 +240,7 @@

/* IOControl register bits (Only 750/760) */
#define SC16IS7XX_IOCONTROL_LATCH_BIT	(1 << 0) /* Enable input latching */
#define SC16IS7XX_IOCONTROL_GPIO_BIT	(1 << 1) /* Enable GPIO[7:4] */
#define SC16IS7XX_IOCONTROL_MODEM_BIT	(1 << 1) /* Enable GPIO[7:4] as modem pins */
#define SC16IS7XX_IOCONTROL_SRESET_BIT	(1 << 3) /* Software Reset */

/* EFCR register bits */
@@ -687,7 +687,7 @@ static void sc16is7xx_port_irq(struct sc16is7xx_port *s, int portno)
		case SC16IS7XX_IIR_CTSRTS_SRC:
			msr = sc16is7xx_port_read(port, SC16IS7XX_MSR_REG);
			uart_handle_cts_change(port,
					       !!(msr & SC16IS7XX_MSR_CTS_BIT));
					       !!(msr & SC16IS7XX_MSR_DCTS_BIT));
			break;
		case SC16IS7XX_IIR_THRI_SRC:
			sc16is7xx_handle_tx(port);