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Commit b7aae4a9 authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull regmap updates from Mark Brown:
 "This has been a very busy release for regmap, not just in cleaning up
  the mess we got ourselves into with the endianness handling but also
  in other areas too:

   - Fixes for the endianness handling so that we now explicitly default
     to little endian (the code used to do this by accident).  This
     fixes handling of explictly specified endianness on big endian
     systems.

   - Optimisation of the implementation of register striding.

   - A refectoring of the _update_bits() code to reduce duplication.

   - Fixes and enhancements for the interrupt implementation which make
     it easier to use in a wider range of systems"

* tag 'regmap-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap: (28 commits)
  regmap: irq: add devm apis for regmap_{add,del}_irq_chip
  regmap: replace regmap_write_bits()
  regmap: irq: Enable irq retriggering for nested irqs
  regmap: add regmap_fields_force_xxx() macros
  regmap: add regmap_field_force_xxx() macros
  regmap: merge regmap_fields_update_bits() into macro
  regmap: merge regmap_fields_write() into macro
  regmap: add regmap_fields_update_bits_base()
  regmap: merge regmap_field_update_bits() into macro
  regmap: merge regmap_field_write() into macro
  regmap: add regmap_field_update_bits_base()
  regmap: merge regmap_update_bits_check_async() into macro
  regmap: merge regmap_update_bits_check() into macro
  regmap: merge regmap_update_bits_async() into macro
  regmap: merge regmap_update_bits() into macro
  regmap: add regmap_update_bits_base()
  regcache: flat: Introduce register strider order
  regcache: Introduce the index parsing API by stride order
  regmap: core: Introduce register stride order
  regmap: irq: add devm apis for regmap_{add,del}_irq_chip
  ...
parents ff280e36 d25263d9
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+7 −4
Original line number Diff line number Diff line
@@ -5,15 +5,18 @@ Index Device Endianness properties
---------------------------------------------------
1         BE         'big-endian'
2         LE         'little-endian'
3	  Native     'native-endian'

For one device driver, which will run in different scenarios above
on different SoCs using the devicetree, we need one way to simplify
this.

Required properties:
- {big,little}-endian: these are boolean properties, if absent
  meaning that the CPU and the Device are in the same endianness mode,
  these properties are for register values and all the buffers only.
Optional properties:
- {big,little,native}-endian: these are boolean properties, if absent
  then the implementation will choose a default based on the device
  being controlled.  These properties are for register values and all
  the buffers only.  Native endian means that the CPU and device have
  the same endianness.

Examples:
Scenario 1 : CPU in LE mode & device in LE mode.
+1 −1
Original line number Diff line number Diff line
@@ -74,7 +74,7 @@
		timer: timer@10000040 {
			compatible = "syscon";
			reg = <0x10000040 0x2c>;
			little-endian;
			native-endian;
		};

		reboot {
+1 −1
Original line number Diff line number Diff line
@@ -54,7 +54,7 @@
		periph_cntl: syscon@10000000 {
			compatible = "syscon";
			reg = <0x10000000 0x14>;
			little-endian;
			native-endian;
		};

		reboot: syscon-reboot@10000008 {
+1 −1
Original line number Diff line number Diff line
@@ -98,7 +98,7 @@
		sun_top_ctrl: syscon@404000 {
			compatible = "brcm,bcm7125-sun-top-ctrl", "syscon";
			reg = <0x404000 0x60c>;
			little-endian;
			native-endian;
		};

		reboot {
+1 −1
Original line number Diff line number Diff line
@@ -118,7 +118,7 @@
		sun_top_ctrl: syscon@404000 {
			compatible = "brcm,bcm7346-sun-top-ctrl", "syscon";
			reg = <0x404000 0x51c>;
			little-endian;
			native-endian;
		};

		reboot {
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