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Commit b75c100e authored by Michael Neuling's avatar Michael Neuling Committed by Benjamin Herrenschmidt
Browse files

powerpc/tm: Move TM abort cause codes to uapi 



These cause codes are usable by userspace, so let's export to uapi.

Signed-off-by: default avatarMichael Neuling <mikey@neuling.org>
Cc: <stable@vger.kernel.org> # v3.9
Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
parent 6ce6c629

arch/powerpc/include/asm/reg.h

+0 −14
Original line number Diff line number Diff line
@@ -111,20 +111,6 @@ 
#define MSR_TM_TRANSACTIONAL(x)	(((x) & MSR_TS_MASK) == MSR_TS_T)

#define MSR_TM_SUSPENDED(x)	(((x) & MSR_TS_MASK) == MSR_TS_S)



/* Reason codes describing kernel causes for transaction aborts.  By

   convention, bit0 is copied to TEXASR[56] (IBM bit 7) which is set if

   the failure is persistent.  PAPR saves 0xff-0xe0 for the hypervisor.

*/

#define TM_CAUSE_PERSISTENT	0x01

#define TM_CAUSE_RESCHED	0xde

#define TM_CAUSE_TLBI		0xdc

#define TM_CAUSE_FAC_UNAV	0xda

#define TM_CAUSE_SYSCALL	0xd8  /* future use */

#define TM_CAUSE_MISC		0xd6  /* future use */

#define TM_CAUSE_SIGNAL		0xd4

#define TM_CAUSE_ALIGNMENT	0xd2

#define TM_CAUSE_EMULATE	0xd0



#if defined(CONFIG_PPC_BOOK3S_64)

#define MSR_64BIT	MSR_SF

arch/powerpc/include/asm/tm.h

+2 −0
Original line number Diff line number Diff line
@@ -5,6 +5,8 @@ 
 * Copyright 2012 Matt Evans & Michael Neuling, IBM Corporation.

 */



#include <uapi/asm/tm.h>



#ifdef CONFIG_PPC_TRANSACTIONAL_MEM

extern void do_load_up_transact_fpu(struct thread_struct *thread);

extern void do_load_up_transact_altivec(struct thread_struct *thread);

arch/powerpc/include/uapi/asm/Kbuild

+1 −0
Original line number Diff line number Diff line
@@ -40,6 +40,7 @@ header-y += statfs.h 
header-y += swab.h

header-y += termbits.h

header-y += termios.h

header-y += tm.h

header-y += types.h

header-y += ucontext.h

header-y += unistd.h

arch/powerpc/include/uapi/asm/tm.h

0 → 100644
+18 −0
Original line number Diff line number Diff line 
#ifndef _ASM_POWERPC_TM_H

#define _ASM_POWERPC_TM_H



/* Reason codes describing kernel causes for transaction aborts.  By

 * convention, bit0 is copied to TEXASR[56] (IBM bit 7) which is set if

 * the failure is persistent.  PAPR saves 0xff-0xe0 for the hypervisor.

 */

#define TM_CAUSE_PERSISTENT	0x01

#define TM_CAUSE_RESCHED	0xde

#define TM_CAUSE_TLBI		0xdc

#define TM_CAUSE_FAC_UNAV	0xda

#define TM_CAUSE_SYSCALL	0xd8  /* future use */

#define TM_CAUSE_MISC		0xd6  /* future use */

#define TM_CAUSE_SIGNAL		0xd4

#define TM_CAUSE_ALIGNMENT	0xd2

#define TM_CAUSE_EMULATE	0xd0



#endif