Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit b707aa50 authored by Lyude's avatar Lyude
Browse files

drm/i915/skl: Remove linetime from skl_wm_values 



Next part of cleaning up the watermark code for skl. This is easy, since
it seems that we never actually needed to keep track of the linetime in
the skl_wm_values struct anyway.

Signed-off-by: default avatarLyude <cpaul@redhat.com>
Reviewed-by: default avatarPaulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: default avatarMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
parent ce0ba283

drivers/gpu/drm/i915/i915_drv.h

+0 −1
Original line number Diff line number Diff line
@@ -1648,7 +1648,6 @@ struct skl_ddb_allocation { 
struct skl_wm_values {

	unsigned dirty_pipes;

	struct skl_ddb_allocation ddb;

	uint32_t wm_linetime[I915_MAX_PIPES];

	uint32_t plane[I915_MAX_PIPES][I915_MAX_PLANES][8];

	uint32_t plane_trans[I915_MAX_PIPES][I915_MAX_PLANES];

};

drivers/gpu/drm/i915/intel_display.c

+5 −3
Original line number Diff line number Diff line
@@ -14844,6 +14844,8 @@ static void intel_begin_crtc_commit(struct drm_crtc *crtc, 
	struct drm_device *dev = crtc->dev;

	struct drm_i915_private *dev_priv = to_i915(dev);

	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);

	struct intel_crtc_state *intel_cstate =

		to_intel_crtc_state(crtc->state);

	struct intel_crtc_state *old_intel_state =

		to_intel_crtc_state(old_crtc_state);

	bool modeset = needs_modeset(crtc->state);
@@ -14860,13 +14862,13 @@ static void intel_begin_crtc_commit(struct drm_crtc *crtc, 
		intel_color_load_luts(crtc->state);

	}



	if (to_intel_crtc_state(crtc->state)->update_pipe)

	if (intel_cstate->update_pipe) {

		intel_update_pipe_config(intel_crtc, old_intel_state);

	else if (INTEL_GEN(dev_priv) >= 9) {

	} else if (INTEL_GEN(dev_priv) >= 9) {

		skl_detach_scalers(intel_crtc);



		I915_WRITE(PIPE_WM_LINETIME(pipe),

			   dev_priv->wm.skl_hw.wm_linetime[pipe]);

			   intel_cstate->wm.skl.optimal.linetime);

	}

}

drivers/gpu/drm/i915/intel_pm.c

+1 −6
Original line number Diff line number Diff line
@@ -3845,8 +3845,6 @@ static void skl_compute_wm_results(struct drm_device *dev, 
		temp |= PLANE_WM_EN;



	r->plane_trans[pipe][PLANE_CURSOR] = temp;



	r->wm_linetime[pipe] = p_wm->linetime;

}



static void skl_ddb_entry_write(struct drm_i915_private *dev_priv,
@@ -4081,7 +4079,6 @@ skl_copy_wm_for_pipe(struct skl_wm_values *dst, 
		     struct skl_wm_values *src,

		     enum pipe pipe)

{

	dst->wm_linetime[pipe] = src->wm_linetime[pipe];

	memcpy(dst->plane[pipe], src->plane[pipe],

	       sizeof(dst->plane[pipe]));

	memcpy(dst->plane_trans[pipe], src->plane_trans[pipe],
@@ -4332,8 +4329,6 @@ static void skl_pipe_wm_get_hw_state(struct drm_crtc *crtc) 


	max_level = ilk_wm_max_level(dev_priv);



	hw->wm_linetime[pipe] = I915_READ(PIPE_WM_LINETIME(pipe));



	for (level = 0; level <= max_level; level++) {

		for (i = 0; i < intel_num_planes(intel_crtc); i++)

			hw->plane[pipe][i][level] =
@@ -4350,7 +4345,7 @@ static void skl_pipe_wm_get_hw_state(struct drm_crtc *crtc) 


	hw->dirty_pipes |= drm_crtc_mask(crtc);



	active->linetime = hw->wm_linetime[pipe];

	active->linetime = I915_READ(PIPE_WM_LINETIME(pipe));



	for (level = 0; level <= max_level; level++) {

		for (i = 0; i < intel_num_planes(intel_crtc); i++) {