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Commit b6d34eb4 authored by Anton Blanchard's avatar Anton Blanchard Committed by Michael Ellerman
Browse files

powerpc: Expose TSCR via sysfs 



The thread switch control register (TSCR) is a per core register
that configures how the CPU shares resources between SMT threads.

Exposing it via sysfs allows us to tune it at run time.

Signed-off-by: default avatarAnton Blanchard <anton@samba.org>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
parent 8d81296c

arch/powerpc/kernel/sysfs.c

+8 −0
Original line number Diff line number Diff line
@@ -485,6 +485,7 @@ SYSFS_PMCSETUP(mmcra, SPRN_MMCRA); 
SYSFS_SPRSETUP(purr, SPRN_PURR);

SYSFS_SPRSETUP(spurr, SPRN_SPURR);

SYSFS_SPRSETUP(pir, SPRN_PIR);

SYSFS_SPRSETUP(tscr, SPRN_TSCR);



/*

  Lets only enable read for phyp resources and
@@ -495,6 +496,7 @@ static DEVICE_ATTR(mmcra, 0600, show_mmcra, store_mmcra); 
static DEVICE_ATTR(spurr, 0400, show_spurr, NULL);

static DEVICE_ATTR(purr, 0400, show_purr, store_purr);

static DEVICE_ATTR(pir, 0400, show_pir, NULL);

static DEVICE_ATTR(tscr, 0600, show_tscr, store_tscr);



/*

 * This is the system wide DSCR register default value. Any
@@ -785,6 +787,9 @@ static int register_cpu_online(unsigned int cpu) 


	if (cpu_has_feature(CPU_FTR_PPCAS_ARCH_V2))

		device_create_file(s, &dev_attr_pir);



	if (cpu_has_feature(CPU_FTR_ARCH_206))

		device_create_file(s, &dev_attr_tscr);

#endif /* CONFIG_PPC64 */



#ifdef CONFIG_PPC_FSL_BOOK3E
@@ -867,6 +872,9 @@ static int unregister_cpu_online(unsigned int cpu) 


	if (cpu_has_feature(CPU_FTR_PPCAS_ARCH_V2))

		device_remove_file(s, &dev_attr_pir);



	if (cpu_has_feature(CPU_FTR_ARCH_206))

		device_remove_file(s, &dev_attr_tscr);

#endif /* CONFIG_PPC64 */



#ifdef CONFIG_PPC_FSL_BOOK3E