ARM: dts: msm: Add LPASS pil node for Scuba

		qcom,pipe-attr-ee;

	};

	qcom,lpass@ab00000 {

		compatible = "qcom,pil-tz-generic";

		reg = <0xab00000 0x00100>;

		clocks = <&rpmcc CXO_SMD_PIL_LPASS_CLK>;

		clock-names = "xo";

		qcom,proxy-clock-names = "xo";

		vdd_lpi_cx-supply = <&VDD_LPI_CX_LEVEL>;

		qcom,vdd_lpi_cx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 0>;

		vdd_lpi_mx-supply = <&VDD_LPI_MX_LEVEL>;

		qcom,vdd_lpi_mx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 0>;

		qcom,proxy-reg-names = "vdd_lpi_cx", "vdd_lpi_mx";

		qcom,firmware-name = "adsp";

		memory-region = <&pil_adsp_mem>;

		qcom,proxy-timeout-ms = <10000>;

		qcom,sysmon-id = <1>;

		qcom,ssctl-instance-id = <0x14>;

		qcom,pas-id = <1>;

		qcom,smem-id = <423>;

		qcom,complete-ramdump;

		/* Inputs from lpass */

		interrupts-extended = <&intc 0 282 IRQ_TYPE_LEVEL_HIGH>,

				      <&adsp_smp2p_in 0 0>,

				      <&adsp_smp2p_in 2 0>,

				      <&adsp_smp2p_in 1 0>,

				      <&adsp_smp2p_in 3 0>;

		interrupt-names = "qcom,wdog",

				  "qcom,err-fatal",

				  "qcom,proxy-unvote",

				  "qcom,err-ready",

				  "qcom,stop-ack";

		/* Outputs to lpass */

		qcom,smem-states = <&adsp_smp2p_out 0>;

		qcom,smem-state-names = "qcom,force-stop";

	};

	pil_modem: qcom,mss@6080000 {

		compatible = "qcom,pil-tz-generic";

		reg = <0x6080000 0x100>;