Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit b6195aab authored by Alan Cox's avatar Alan Cox Committed by Dave Airlie
Browse files

gma500: Fix Cedarview support (Correct version) 

And update to the actual product naming as the press release is now out.

http://newsroom.intel.com/docs/DOC-2553#pressmaterials



- Fixes the wrong ifdef check
- Fixes the missing crtc count declaration

Signed-off-by: default avatarAlan Cox <alan@linux.intel.com>
Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
parent 56125db1

drivers/gpu/drm/gma500/Kconfig

+4 −3
Original line number Diff line number Diff line
@@ -19,8 +19,9 @@ config DRM_GMA600 
	  platforms with LVDS ports. HDMI and MIPI are not currently

	  supported.



config DRM_CEDARVIEW

	bool "Intel Cedarview support (Experimental)"

config DRM_GMA3600

	bool "Intel GMA3600/3650 support (Experimental)"

	depends on DRM_GMA500

	help

	  Say yes to include support for Intel Cedarview platforms
 
	  Say yes to include basic support for Intel GMA3600/3650 (Intel

	  Cedar Trail) platforms.

drivers/gpu/drm/gma500/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -25,7 +25,7 @@ gma500_gfx-y += gem_glue.o \ 
	  psb_device.o \

	  mid_bios.o



gma500_gfx-$(CONFIG_DRM_CEDARVIEW) +=  cdv_device.o \

gma500_gfx-$(CONFIG_DRM_GMA3600) +=  cdv_device.o \

	  cdv_intel_crt.o \

	  cdv_intel_display.o \

	  cdv_intel_hdmi.o \

drivers/gpu/drm/gma500/cdv_device.c

+2 −1
Original line number Diff line number Diff line
@@ -327,9 +327,10 @@ static int cdv_chip_setup(struct drm_device *dev) 
/* CDV is much like Poulsbo but has MID like SGX offsets and PM */



const struct psb_ops cdv_chip_ops = {

	.name = "Cedartrail",

	.name = "GMA3600/3650",

	.accel_2d = 0,

	.pipes = 2,

	.crtcs = 2,

	.sgx_offset = MRST_SGX_OFFSET,

	.chip_setup = cdv_chip_setup,

drivers/gpu/drm/gma500/psb_drv.c

+1 −1
Original line number Diff line number Diff line
@@ -64,7 +64,7 @@ static DEFINE_PCI_DEVICE_TABLE(pciidlist) = { 
	/* Atom E620 */

	{ 0x8086, 0x4108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops},

#endif

#if defined(CONFIG_DRM_CDV)

#if defined(CONFIG_DRM_GMA3600)

	{ 0x8086, 0x0be0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},

	{ 0x8086, 0x0be1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},

	{ 0x8086, 0x0be2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},