Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit b579f924 authored by Michel Thierry's avatar Michel Thierry Committed by Joonas Lahtinen
Browse files

drm/i915/gen9: Add WaClearHIZ_WM_CHICKEN3 for bxt and glk 



Factor in clear values wherever required while updating destination
min/max.

References: HSDES#1604444184
Signed-off-by: default avatarMichel Thierry <michel.thierry@intel.com>
Cc: mesa-dev@lists.freedesktop.org
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: Oscar Mateo <oscar.mateo@intel.com>
Reviewed-by: default avatarMika Kuoppala <mika.kuoppala@linux.intel.com>
Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20180510200708.18097-1-michel.thierry@intel.com
Cc: stable@vger.kernel.org
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180514165445.9198-1-michel.thierry@intel.com


(backported from commit 0c79f9cb)
Signed-off-by: default avatarJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
parent cd078bf9

drivers/gpu/drm/i915/i915_reg.h

+3 −0
Original line number Diff line number Diff line
@@ -7326,6 +7326,9 @@ enum { 
#define SLICE_ECO_CHICKEN0			_MMIO(0x7308)

#define   PIXEL_MASK_CAMMING_DISABLE		(1 << 14)



#define GEN9_WM_CHICKEN3			_MMIO(0x5588)

#define   GEN9_FACTOR_IN_CLR_VAL_HIZ		(1 << 9)



/* WaCatErrorRejectionIssue */

#define GEN7_SQ_CHICKEN_MBCUNIT_CONFIG		_MMIO(0x9030)

#define  GEN7_SQ_CHICKEN_MBCUNIT_SQINTMOB	(1<<11)

drivers/gpu/drm/i915/intel_engine_cs.c

+4 −0
Original line number Diff line number Diff line
@@ -1149,6 +1149,10 @@ static int gen9_init_workarounds(struct intel_engine_cs *engine) 
	WA_SET_FIELD_MASKED(GEN8_CS_CHICKEN1, GEN9_PREEMPT_GPGPU_LEVEL_MASK,

			    GEN9_PREEMPT_GPGPU_COMMAND_LEVEL);



	/* WaClearHIZ_WM_CHICKEN3:bxt,glk */

	if (IS_GEN9_LP(dev_priv))

		WA_SET_BIT_MASKED(GEN9_WM_CHICKEN3, GEN9_FACTOR_IN_CLR_VAL_HIZ);



	/* WaVFEStateAfterPipeControlwithMediaStateClear:skl,bxt,glk,cfl */

	ret = wa_ring_whitelist_reg(engine, GEN9_CTX_PREEMPT_REG);

	if (ret)