Loading arch/arm/boot/dts/motorola-cpcap-mapphone.dtsi +50 −1 Original line number Diff line number Diff line Loading @@ -11,7 +11,7 @@ compatible = "motorola,cpcap", "st,6556002"; reg = <0>; /* cs0 */ interrupt-parent = <&gpio1>; interrupts = <7 IRQ_TYPE_EDGE_RISING>; interrupts = <7 IRQ_TYPE_LEVEL_HIGH>; interrupt-controller; #interrupt-cells = <2>; #address-cells = <1>; Loading @@ -19,6 +19,32 @@ spi-max-frequency = <3000000>; spi-cs-high; cpcap_adc: adc { compatible = "motorola,mapphone-cpcap-adc"; interrupts-extended = <&cpcap 8 0>; interrupt-names = "adcdone"; #io-channel-cells = <1>; }; cpcap_charger: charger { compatible = "motorola,mapphone-cpcap-charger"; interrupts-extended = < &cpcap 13 0 &cpcap 12 0 &cpcap 29 0 &cpcap 28 0 &cpcap 22 0 &cpcap 20 0 &cpcap 19 0 &cpcap 54 0 >; interrupt-names = "chrg_det", "rvrs_chrg", "chrg_se1b", "se0conn", "rvrs_mode", "chrgcurr1", "vbusvld", "battdetb"; mode-gpios = <&gpio3 29 GPIO_ACTIVE_LOW &gpio3 23 GPIO_ACTIVE_LOW>; io-channels = <&cpcap_adc 0 &cpcap_adc 1 &cpcap_adc 2 &cpcap_adc 5 &cpcap_adc 6>; io-channel-names = "battdetb", "battp", "vbus", "chg_isense", "batti"; }; cpcap_regulator: regulator { compatible = "motorola,mapphone-cpcap-regulator"; Loading @@ -39,6 +65,29 @@ interrupts = <23 IRQ_TYPE_NONE>; }; cpcap_usb2_phy: phy { compatible = "motorola,mapphone-cpcap-usb-phy"; pinctrl-0 = <&usb_gpio_mux_sel1 &usb_gpio_mux_sel2>; pinctrl-1 = <&usb_ulpi_pins>; pinctrl-2 = <&usb_utmi_pins>; pinctrl-3 = <&uart3_pins>; pinctrl-names = "default", "ulpi", "utmi", "uart"; #phy-cells = <0>; interrupts-extended = < &cpcap 15 0 &cpcap 14 0 &cpcap 28 0 &cpcap 19 0 &cpcap 18 0 &cpcap 17 0 &cpcap 16 0 &cpcap 49 0 &cpcap 48 1 >; interrupt-names = "id_ground", "id_float", "se0conn", "vbusvld", "sessvld", "sessend", "se1", "dm", "dp"; mode-gpios = <&gpio2 28 GPIO_ACTIVE_HIGH &gpio1 0 GPIO_ACTIVE_HIGH>; io-channels = <&cpcap_adc 2>, <&cpcap_adc 7>; io-channel-names = "vbus", "id"; vusb-supply = <&vusb>; }; led_red: led-red { compatible = "motorola,cpcap-led-red"; vdd-supply = <&sw5>; Loading arch/arm/boot/dts/omap4-droid4-xt894.dts +1 −12 Original line number Diff line number Diff line Loading @@ -24,8 +24,7 @@ /* * We seem to have only 1021 MB accessible, 1021 - 1022 is locked, * then 1023 - 1024 seems to contain mbm. For SRAM, see the notes * below about SRAM and L3_ICLK2 being unused by default, * then 1023 - 1024 seems to contain mbm. */ memory { device_type = "memory"; Loading Loading @@ -176,11 +175,6 @@ }; }; /* L3_2 interconnect is unused, SRAM, GPMC and L3_ICLK2 disabled */ &gpmc { status = "disabled"; }; &hdmi { status = "okay"; pinctrl-0 = <&dss_hdmi_pins>; Loading Loading @@ -356,11 +350,6 @@ }; }; /* L3_2 interconnect is unused, SRAM, GPMC and L3_ICLK2 disabled */ &ocmcram { status = "disabled"; }; &omap4_pmx_core { /* hdmi_hpd.gpio_63 */ Loading Loading
arch/arm/boot/dts/motorola-cpcap-mapphone.dtsi +50 −1 Original line number Diff line number Diff line Loading @@ -11,7 +11,7 @@ compatible = "motorola,cpcap", "st,6556002"; reg = <0>; /* cs0 */ interrupt-parent = <&gpio1>; interrupts = <7 IRQ_TYPE_EDGE_RISING>; interrupts = <7 IRQ_TYPE_LEVEL_HIGH>; interrupt-controller; #interrupt-cells = <2>; #address-cells = <1>; Loading @@ -19,6 +19,32 @@ spi-max-frequency = <3000000>; spi-cs-high; cpcap_adc: adc { compatible = "motorola,mapphone-cpcap-adc"; interrupts-extended = <&cpcap 8 0>; interrupt-names = "adcdone"; #io-channel-cells = <1>; }; cpcap_charger: charger { compatible = "motorola,mapphone-cpcap-charger"; interrupts-extended = < &cpcap 13 0 &cpcap 12 0 &cpcap 29 0 &cpcap 28 0 &cpcap 22 0 &cpcap 20 0 &cpcap 19 0 &cpcap 54 0 >; interrupt-names = "chrg_det", "rvrs_chrg", "chrg_se1b", "se0conn", "rvrs_mode", "chrgcurr1", "vbusvld", "battdetb"; mode-gpios = <&gpio3 29 GPIO_ACTIVE_LOW &gpio3 23 GPIO_ACTIVE_LOW>; io-channels = <&cpcap_adc 0 &cpcap_adc 1 &cpcap_adc 2 &cpcap_adc 5 &cpcap_adc 6>; io-channel-names = "battdetb", "battp", "vbus", "chg_isense", "batti"; }; cpcap_regulator: regulator { compatible = "motorola,mapphone-cpcap-regulator"; Loading @@ -39,6 +65,29 @@ interrupts = <23 IRQ_TYPE_NONE>; }; cpcap_usb2_phy: phy { compatible = "motorola,mapphone-cpcap-usb-phy"; pinctrl-0 = <&usb_gpio_mux_sel1 &usb_gpio_mux_sel2>; pinctrl-1 = <&usb_ulpi_pins>; pinctrl-2 = <&usb_utmi_pins>; pinctrl-3 = <&uart3_pins>; pinctrl-names = "default", "ulpi", "utmi", "uart"; #phy-cells = <0>; interrupts-extended = < &cpcap 15 0 &cpcap 14 0 &cpcap 28 0 &cpcap 19 0 &cpcap 18 0 &cpcap 17 0 &cpcap 16 0 &cpcap 49 0 &cpcap 48 1 >; interrupt-names = "id_ground", "id_float", "se0conn", "vbusvld", "sessvld", "sessend", "se1", "dm", "dp"; mode-gpios = <&gpio2 28 GPIO_ACTIVE_HIGH &gpio1 0 GPIO_ACTIVE_HIGH>; io-channels = <&cpcap_adc 2>, <&cpcap_adc 7>; io-channel-names = "vbus", "id"; vusb-supply = <&vusb>; }; led_red: led-red { compatible = "motorola,cpcap-led-red"; vdd-supply = <&sw5>; Loading
arch/arm/boot/dts/omap4-droid4-xt894.dts +1 −12 Original line number Diff line number Diff line Loading @@ -24,8 +24,7 @@ /* * We seem to have only 1021 MB accessible, 1021 - 1022 is locked, * then 1023 - 1024 seems to contain mbm. For SRAM, see the notes * below about SRAM and L3_ICLK2 being unused by default, * then 1023 - 1024 seems to contain mbm. */ memory { device_type = "memory"; Loading Loading @@ -176,11 +175,6 @@ }; }; /* L3_2 interconnect is unused, SRAM, GPMC and L3_ICLK2 disabled */ &gpmc { status = "disabled"; }; &hdmi { status = "okay"; pinctrl-0 = <&dss_hdmi_pins>; Loading Loading @@ -356,11 +350,6 @@ }; }; /* L3_2 interconnect is unused, SRAM, GPMC and L3_ICLK2 disabled */ &ocmcram { status = "disabled"; }; &omap4_pmx_core { /* hdmi_hpd.gpio_63 */ Loading