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Commit b483666b authored by Dave Airlie's avatar Dave Airlie
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Merge branch 'drm-next-4.5' of git://people.freedesktop.org/~agd5f/linux into drm-next

Misc fixes for amdgpu and radeon for 4.5.  The bulk of the changes
are smatch fixes and cleanups.  This also includes the DP MST fixes
from Mykola.  Beyond that some fixes from Christian to avoid -ENOMEM
errors in some corner cases in the CS ioctl, some suspend and resume
fixes, and some powerplay fixes.

* 'drm-next-4.5' of git://people.freedesktop.org/~agd5f/linux: (33 commits)
  drm/radeon: fix trivial typo in warning message
  radeon: r100: Silence 'may be used uninitialized' warnings
  drm/amdgpu: add warning to amdgpu_bo_gpu_offset() v2
  drm/amd/powerplay: implement power down asic task for CZ
  drm/amd/powerplay: enable power down asic task. (v2)
  drm/amd/powerplay: enable set boot state task
  drm/amd/powerplay: add thermal control task when resume.
  drm/amdgpu: fix hex/decimal bug when show gpu load.
  drm/amdgpu: Show gpu load when display gpu performance for Fiji of VI.
  drm/amdgpu: Show gpu load when display gpu performance for Ci.
  drm/amd/powerplay: Reload and initialize the smc firmware on powerplay resume.
  drm/amd/powerplay: add powerplay valid check to avoid null point. (v2)
  drm/amd/powerplay: fix Smatch static checker warnings
  drm/amd/powerplay: fix Smatch static checker warnings with indenting (v2)
  drm/amd/powerplay: fix bug that NULL checks are reversed.
  amdgpu/dce11:  Add test for crtc < 0 to various DCEv11 functions
  amdgpu/dce11: Remove division from dce_v11_0_vblank_wait()
  amdgpu/vce3: Simplify vce_v3_0_hw_init and ensure both rings default to not ready.
  amdgpu/vce3: Remove magic constants from harvest register masks.
  amdgpu/vce3: Simplify vce_v3_0_process_interrupt()
  ...
parents c11b8989 13c240ef
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+9 −9
Original line number Diff line number Diff line
@@ -847,8 +847,8 @@ static int amdgpu_cgs_acpi_eval_object(void *cgs_device,
		func_no = argument->value;
		for (i = 0; i < info->input_count; i++) {
			if (((argument->type == ACPI_TYPE_STRING) ||
					(argument->type == ACPI_TYPE_BUFFER))
					&& (argument->pointer == NULL))
			     (argument->type == ACPI_TYPE_BUFFER)) &&
			    (argument->pointer == NULL))
				return -EINVAL;
			argument++;
		}
+1 −0
Original line number Diff line number Diff line
@@ -96,6 +96,7 @@ static inline void amdgpu_bo_unreserve(struct amdgpu_bo *bo)
 */
static inline u64 amdgpu_bo_gpu_offset(struct amdgpu_bo *bo)
{
	WARN_ON_ONCE(bo->tbo.mem.mem_type == TTM_PL_SYSTEM);
	return bo->tbo.offset;
}

+12 −2
Original line number Diff line number Diff line
@@ -1395,7 +1395,6 @@ static void ci_thermal_stop_thermal_controller(struct amdgpu_device *adev)
		ci_fan_ctrl_set_default_mode(adev);
}

#if 0
static int ci_read_smc_soft_register(struct amdgpu_device *adev,
				     u16 reg_offset, u32 *value)
{
@@ -1405,7 +1404,6 @@ static int ci_read_smc_soft_register(struct amdgpu_device *adev,
				      pi->soft_regs_start + reg_offset,
				      value, pi->sram_end);
}
#endif

static int ci_write_smc_soft_register(struct amdgpu_device *adev,
				      u16 reg_offset, u32 value)
@@ -6084,11 +6082,23 @@ ci_dpm_debugfs_print_current_performance_level(struct amdgpu_device *adev,
	struct amdgpu_ps *rps = &pi->current_rps;
	u32 sclk = ci_get_average_sclk_freq(adev);
	u32 mclk = ci_get_average_mclk_freq(adev);
	u32 activity_percent = 50;
	int ret;

	ret = ci_read_smc_soft_register(adev, offsetof(SMU7_SoftRegisters, AverageGraphicsA),
					&activity_percent);

	if (ret == 0) {
		activity_percent += 0x80;
		activity_percent >>= 8;
		activity_percent = activity_percent > 100 ? 100 : activity_percent;
	}

	seq_printf(m, "uvd %sabled\n", pi->uvd_enabled ? "en" : "dis");
	seq_printf(m, "vce %sabled\n", rps->vce_active ? "en" : "dis");
	seq_printf(m, "power level avg    sclk: %u mclk: %u\n",
		   sclk, mclk);
	seq_printf(m, "GPU load: %u %%\n", activity_percent);
}

static void ci_dpm_print_power_state(struct amdgpu_device *adev,
+9 −7
Original line number Diff line number Diff line
@@ -211,9 +211,9 @@ static bool dce_v11_0_is_counter_moving(struct amdgpu_device *adev, int crtc)
 */
static void dce_v11_0_vblank_wait(struct amdgpu_device *adev, int crtc)
{
	unsigned i = 0;
	unsigned i = 100;

	if (crtc >= adev->mode_info.num_crtc)
	if (crtc < 0 || crtc >= adev->mode_info.num_crtc)
		return;

	if (!(RREG32(mmCRTC_CONTROL + crtc_offsets[crtc]) & CRTC_CONTROL__CRTC_MASTER_EN_MASK))
@@ -223,14 +223,16 @@ static void dce_v11_0_vblank_wait(struct amdgpu_device *adev, int crtc)
	 * wait for another frame.
	 */
	while (dce_v11_0_is_in_vblank(adev, crtc)) {
		if (i++ % 100 == 0) {
		if (i++ == 100) {
			i = 0;
			if (!dce_v11_0_is_counter_moving(adev, crtc))
				break;
		}
	}

	while (!dce_v11_0_is_in_vblank(adev, crtc)) {
		if (i++ % 100 == 0) {
		if (i++ == 100) {
			i = 0;
			if (!dce_v11_0_is_counter_moving(adev, crtc))
				break;
		}
@@ -239,7 +241,7 @@ static void dce_v11_0_vblank_wait(struct amdgpu_device *adev, int crtc)

static u32 dce_v11_0_vblank_get_counter(struct amdgpu_device *adev, int crtc)
{
	if (crtc >= adev->mode_info.num_crtc)
	if (crtc < 0 || crtc >= adev->mode_info.num_crtc)
		return 0;
	else
		return RREG32(mmCRTC_STATUS_FRAME_COUNT + crtc_offsets[crtc]);
@@ -3384,7 +3386,7 @@ static void dce_v11_0_crtc_vblank_int_ack(struct amdgpu_device *adev,
{
	u32 tmp;

	if (crtc >= adev->mode_info.num_crtc) {
	if (crtc < 0 || crtc >= adev->mode_info.num_crtc) {
		DRM_DEBUG("invalid crtc %d\n", crtc);
		return;
	}
@@ -3399,7 +3401,7 @@ static void dce_v11_0_crtc_vline_int_ack(struct amdgpu_device *adev,
{
	u32 tmp;

	if (crtc >= adev->mode_info.num_crtc) {
	if (crtc < 0 || crtc >= adev->mode_info.num_crtc) {
		DRM_DEBUG("invalid crtc %d\n", crtc);
		return;
	}
+0 −1
Original line number Diff line number Diff line
@@ -1016,7 +1016,6 @@ static int gmc_v7_0_suspend(void *handle)
	struct amdgpu_device *adev = (struct amdgpu_device *)handle;

	if (adev->vm_manager.enabled) {
		amdgpu_vm_manager_fini(adev);
		gmc_v7_0_vm_fini(adev);
		adev->vm_manager.enabled = false;
	}
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