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Commit b3e3bd71 authored by Nicolas Ferre's avatar Nicolas Ferre Committed by David S. Miller
Browse files

net/macb: GEM DMA configuration register update 



Add information to the DMA Configuration Register to
maximize system performance:
- rx/tx packet buffer full memory size
- allow possibility to use INCR16 if supported

Signed-off-by: default avatarNicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: default avatarJoachim Eastwood <manabian@gmail.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 452b5ecd

drivers/net/ethernet/cadence/macb.c

+8 −2
Original line number Diff line number Diff line
@@ -1033,8 +1033,12 @@ static u32 macb_dbw(struct macb *bp) 
}



/*

 * Configure the receive DMA engine to use the correct receive buffer size.

 * This is a configurable parameter for GEM.

 * Configure the receive DMA engine

 * - use the correct receive buffer size

 * - set the possibility to use INCR16 bursts

 *   (if not supported by FIFO, it will fallback to default)

 * - set both rx/tx packet buffers to full memory size

 * These are configurable parameters for GEM.

 */

static void macb_configure_dma(struct macb *bp)

{
@@ -1043,6 +1047,8 @@ static void macb_configure_dma(struct macb *bp) 
	if (macb_is_gem(bp)) {

		dmacfg = gem_readl(bp, DMACFG) & ~GEM_BF(RXBS, -1L);

		dmacfg |= GEM_BF(RXBS, RX_BUFFER_SIZE / 64);

		dmacfg |= GEM_BF(FBLDO, 16);

		dmacfg |= GEM_BIT(TXPBMS) | GEM_BF(RXBMS, -1L);

		gem_writel(bp, DMACFG, dmacfg);

	}

}

drivers/net/ethernet/cadence/macb.h

+11 −0
Original line number Diff line number Diff line
@@ -171,8 +171,19 @@ 
#define GEM_DBW128				2



/* Bitfields in DMACFG. */

#define GEM_FBLDO_OFFSET			0

#define GEM_FBLDO_SIZE				5

#define GEM_RXBMS_OFFSET			8

#define GEM_RXBMS_SIZE				2

#define GEM_TXPBMS_OFFSET			10

#define GEM_TXPBMS_SIZE				1

#define GEM_TXCOEN_OFFSET			11

#define GEM_TXCOEN_SIZE				1

#define GEM_RXBS_OFFSET				16

#define GEM_RXBS_SIZE				8

#define GEM_DDRP_OFFSET				24

#define GEM_DDRP_SIZE				1





/* Bitfields in NSR */

#define MACB_NSR_LINK_OFFSET			0