Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit b3df4ec4 authored by Thomas Gleixner's avatar Thomas Gleixner Committed by Ingo Molnar
Browse files

perf/x86/intel/cqm: Use proper data types 



'int' is really not a proper data type for an MSR. Use u32 to make it
clear that we are dealing with a 32-bit unsigned hardware value.

Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Signed-off-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: default avatarMatt Fleming <matt.fleming@intel.com>
Cc: Kanaka Juvva <kanaka.d.juvva@intel.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Vikas Shivappa <vikas.shivappa@linux.intel.com>
Cc: Will Auld <will.auld@intel.com>
Link: http://lkml.kernel.org/r/20150518235149.919350144@linutronix.de


Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
parent f4d9757c

arch/x86/kernel/cpu/perf_event_intel_cqm.c

+2 −2
Original line number Diff line number Diff line
@@ -18,7 +18,7 @@ static unsigned int cqm_l3_scale; /* supposedly cacheline size */ 


struct intel_cqm_state {

	raw_spinlock_t		lock;

	int			rmid;

	u32			rmid;

	int			cnt;

};
@@ -962,7 +962,7 @@ static u64 intel_cqm_event_count(struct perf_event *event) 
static void intel_cqm_event_start(struct perf_event *event, int mode)

{

	struct intel_cqm_state *state = this_cpu_ptr(&cqm_state);

	unsigned int rmid = event->hw.cqm_rmid;

	u32 rmid = event->hw.cqm_rmid;

	unsigned long flags;



	if (!(event->hw.cqm_state & PERF_HES_STOPPED))

include/linux/perf_event.h

+1 −1
Original line number Diff line number Diff line
@@ -120,7 +120,7 @@ struct hw_perf_event { 
		};

		struct { /* intel_cqm */

			int			cqm_state;

			int			cqm_rmid;

			u32			cqm_rmid;

			struct list_head	cqm_events_entry;

			struct list_head	cqm_groups_entry;

			struct list_head	cqm_group_entry;