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Commit b3aefc2f authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'sparc64-context-wrap-fixes' 



Pavel Tatashin says:

====================
sparc64: context wrap fixes

This patch series contains fixes for context wrap: when we are out of
context ids, and need to get a new version.

It fixes memory corruption issues which happen when more than number of
context ids (currently set to 8K) number of processes are started
simultaneously, and processes can get a wrong context.

sparc64: new context wrap:
- contains explanation of new wrap method, and also explanation of races
  that it solves
sparc64: reset mm cpumask after wrap
- explains issue of not reseting cpu mask on a wrap
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents f322980b 0197e41c

arch/sparc/include/asm/mmu_64.h

+1 −1
Original line number Diff line number Diff line
@@ -52,7 +52,7 @@ 
#define CTX_NR_MASK		TAG_CONTEXT_BITS

#define CTX_HW_MASK		(CTX_NR_MASK | CTX_PGSZ_MASK)



#define CTX_FIRST_VERSION	((_AC(1,UL) << CTX_VERSION_SHIFT) + _AC(1,UL))

#define CTX_FIRST_VERSION	BIT(CTX_VERSION_SHIFT)

#define CTX_VALID(__ctx)	\

	 (!(((__ctx.sparc64_ctx_val) ^ tlb_context_cache) & CTX_VERSION_MASK))

#define CTX_HWBITS(__ctx)	((__ctx.sparc64_ctx_val) & CTX_HW_MASK)

arch/sparc/include/asm/mmu_context_64.h

+4 −28
Original line number Diff line number Diff line
@@ -19,13 +19,8 @@ extern spinlock_t ctx_alloc_lock; 
extern unsigned long tlb_context_cache;

extern unsigned long mmu_context_bmap[];



DECLARE_PER_CPU(struct mm_struct *, per_cpu_secondary_mm);

void get_new_mmu_context(struct mm_struct *mm);

#ifdef CONFIG_SMP

void smp_new_mmu_context_version(void);

#else

#define smp_new_mmu_context_version() do { } while (0)

#endif



int init_new_context(struct task_struct *tsk, struct mm_struct *mm);

void destroy_context(struct mm_struct *mm);
@@ -76,8 +71,9 @@ void __flush_tlb_mm(unsigned long, unsigned long); 
static inline void switch_mm(struct mm_struct *old_mm, struct mm_struct *mm, struct task_struct *tsk)

{

	unsigned long ctx_valid, flags;

	int cpu;

	int cpu = smp_processor_id();



	per_cpu(per_cpu_secondary_mm, cpu) = mm;

	if (unlikely(mm == &init_mm))

		return;
@@ -123,7 +119,6 @@ static inline void switch_mm(struct mm_struct *old_mm, struct mm_struct *mm, str 
	 * for the first time, we must flush that context out of the

	 * local TLB.

	 */

	cpu = smp_processor_id();

	if (!ctx_valid || !cpumask_test_cpu(cpu, mm_cpumask(mm))) {

		cpumask_set_cpu(cpu, mm_cpumask(mm));

		__flush_tlb_mm(CTX_HWBITS(mm->context),
@@ -133,26 +128,7 @@ static inline void switch_mm(struct mm_struct *old_mm, struct mm_struct *mm, str 
}



#define deactivate_mm(tsk,mm)	do { } while (0)



/* Activate a new MM instance for the current task. */

static inline void activate_mm(struct mm_struct *active_mm, struct mm_struct *mm)

{

	unsigned long flags;

	int cpu;



	spin_lock_irqsave(&mm->context.lock, flags);

	if (!CTX_VALID(mm->context))

		get_new_mmu_context(mm);

	cpu = smp_processor_id();

	if (!cpumask_test_cpu(cpu, mm_cpumask(mm)))

		cpumask_set_cpu(cpu, mm_cpumask(mm));



	load_secondary_context(mm);

	__flush_tlb_mm(CTX_HWBITS(mm->context), SECONDARY_CONTEXT);

	tsb_context_switch(mm);

	spin_unlock_irqrestore(&mm->context.lock, flags);

}



#define activate_mm(active_mm, mm) switch_mm(active_mm, mm, NULL)

#endif /* !(__ASSEMBLY__) */



#endif /* !(__SPARC64_MMU_CONTEXT_H) */

arch/sparc/include/asm/pil.h

+0 −1
Original line number Diff line number Diff line
@@ -20,7 +20,6 @@ 
#define PIL_SMP_CALL_FUNC	1

#define PIL_SMP_RECEIVE_SIGNAL	2

#define PIL_SMP_CAPTURE		3

#define PIL_SMP_CTX_NEW_VERSION	4

#define PIL_DEVICE_IRQ		5

#define PIL_SMP_CALL_FUNC_SNGL	6

#define PIL_DEFERRED_PCR_WORK	7

arch/sparc/kernel/kernel.h

+0 −1
Original line number Diff line number Diff line
@@ -37,7 +37,6 @@ void handle_stdfmna(struct pt_regs *regs, unsigned long sfar, unsigned long sfsr 
/* smp_64.c */

void __irq_entry smp_call_function_client(int irq, struct pt_regs *regs);

void __irq_entry smp_call_function_single_client(int irq, struct pt_regs *regs);

void __irq_entry smp_new_mmu_context_version_client(int irq, struct pt_regs *regs);

void __irq_entry smp_penguin_jailcell(int irq, struct pt_regs *regs);

void __irq_entry smp_receive_signal_client(int irq, struct pt_regs *regs);

arch/sparc/kernel/smp_64.c

+0 −31
Original line number Diff line number Diff line
@@ -964,37 +964,6 @@ void flush_dcache_page_all(struct mm_struct *mm, struct page *page) 
	preempt_enable();

}



void __irq_entry smp_new_mmu_context_version_client(int irq, struct pt_regs *regs)

{

	struct mm_struct *mm;

	unsigned long flags;



	clear_softint(1 << irq);



	/* See if we need to allocate a new TLB context because

	 * the version of the one we are using is now out of date.

	 */

	mm = current->active_mm;

	if (unlikely(!mm || (mm == &init_mm)))

		return;



	spin_lock_irqsave(&mm->context.lock, flags);



	if (unlikely(!CTX_VALID(mm->context)))

		get_new_mmu_context(mm);



	spin_unlock_irqrestore(&mm->context.lock, flags);



	load_secondary_context(mm);

	__flush_tlb_mm(CTX_HWBITS(mm->context),

		       SECONDARY_CONTEXT);

}



void smp_new_mmu_context_version(void)

{

	smp_cross_call(&xcall_new_mmu_context_version, 0, 0, 0);

}



#ifdef CONFIG_KGDB

void kgdb_roundup_cpus(unsigned long flags)

{