Merge tag 'spi-v4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi

			 specifiers, one for transmission, and one for

			 reception.

- dma-names            : Must contain a list of two DMA names, "tx" and "rx".

- spi-slave            : Empty property indicating the SPI controller is used

			 in slave mode.

- renesas,dtdl         : delay sync signal (setup) in transmit mode.

			 Must contain one of the following values:

			 0   (no bit delay)

SPI (Serial Peripheral Interface) busses

SPI busses can be described with a node for the SPI master device

and a set of child nodes for each SPI slave on the bus.  For this

discussion, it is assumed that the system's SPI controller is in

SPI master mode.  This binding does not describe SPI controllers

in slave mode.

SPI busses can be described with a node for the SPI controller device

and a set of child nodes for each SPI slave on the bus.  The system's SPI

controller may be described for use in SPI master mode or in SPI slave mode,

but not for both at the same time.

The SPI master node requires the following properties:

The SPI controller node requires the following properties:

- compatible      - Name of SPI bus controller following generic names

		    recommended practice.

In master mode, the SPI controller node requires the following additional

properties:

- #address-cells  - number of cells required to define a chip select

		address on the SPI bus.

- #size-cells     - should be zero.

- compatible      - name of SPI bus controller following generic names

		recommended practice.

In slave mode, the SPI controller node requires one additional property:

- spi-slave       - Empty property.

No other properties are required in the SPI bus node.  It is assumed

that a driver for an SPI bus device will understand that it is an SPI bus.

However, the binding does not attempt to define the specific method for

chip selects.  Individual drivers can define additional properties to

support describing the chip select layout.

Optional properties:

Optional properties (master mode only):

- cs-gpios	  - gpios chip select.

- num-cs	  - total number of chipselects.

cs2 : &gpio1 1 0

cs3 : &gpio1 2 0

SPI slave nodes must be children of the SPI master node and can

contain the following properties.

- reg             - (required) chip select address of device.

- compatible      - (required) name of SPI device following generic names

		recommended practice.

- spi-max-frequency - (required) Maximum SPI clocking speed of device in Hz.

- spi-cpol        - (optional) Empty property indicating device requires

		inverse clock polarity (CPOL) mode.

- spi-cpha        - (optional) Empty property indicating device requires

		shifted clock phase (CPHA) mode.

- spi-cs-high     - (optional) Empty property indicating device requires

		chip select active high.

- spi-3wire       - (optional) Empty property indicating device requires

		3-wire mode.

- spi-lsb-first   - (optional) Empty property indicating device requires

		LSB first mode.

- spi-tx-bus-width - (optional) The bus width (number of data wires) that is

                      used for MOSI. Defaults to 1 if not present.

- spi-rx-bus-width - (optional) The bus width (number of data wires) that is

                      used for MISO. Defaults to 1 if not present.

- spi-rx-delay-us  - (optional) Microsecond delay after a read transfer.

- spi-tx-delay-us  - (optional) Microsecond delay after a write transfer.

SPI slave nodes must be children of the SPI controller node.

In master mode, one or more slave nodes (up to the number of chip selects) can

be present.  Required properties are:

- compatible      - Name of SPI device following generic names recommended

		    practice.

- reg             - Chip select address of device.

- spi-max-frequency - Maximum SPI clocking speed of device in Hz.

In slave mode, the (single) slave node is optional.

If present, it must be called "slave".  Required properties are:

- compatible      - Name of SPI device following generic names recommended

		    practice.

All slave nodes can contain the following optional properties:

- spi-cpol        - Empty property indicating device requires inverse clock

		    polarity (CPOL) mode.

- spi-cpha        - Empty property indicating device requires shifted clock

		    phase (CPHA) mode.

- spi-cs-high     - Empty property indicating device requires chip select

		    active high.

- spi-3wire       - Empty property indicating device requires 3-wire mode.

- spi-lsb-first   - Empty property indicating device requires LSB first mode.

- spi-tx-bus-width - The bus width (number of data wires) that is used for MOSI.

		    Defaults to 1 if not present.

- spi-rx-bus-width - The bus width (number of data wires) that is used for MISO.

		    Defaults to 1 if not present.

- spi-rx-delay-us - Microsecond delay after a read transfer.

- spi-tx-delay-us - Microsecond delay after a write transfer.

Some SPI controllers and devices support Dual and Quad SPI transfer mode.

It allows data in the SPI system to be transferred using 2 wires (DUAL) or 4

		#address-cells = <1>;

		#size-cells = <0>;

	};

* SPICC (SPI Communication Controller)

The Meson SPICC is generic SPI controller for general purpose Full-Duplex

communications with dedicated 16 words RX/TX PIO FIFOs.

Required properties:

 - compatible: should be "amlogic,meson-gx-spicc" on Amlogic GX SoCs.

 - reg: physical base address and length of the controller registers

 - interrupts: The interrupt specifier

 - clock-names: Must contain "core"

 - clocks: phandle of the input clock for the baud rate generator

 - #address-cells: should be 1

 - #size-cells: should be 0

Optional properties:

 - resets: phandle of the internal reset line

See ../spi/spi-bus.txt for more details on SPI bus master and slave devices

required and optional properties.

Example :

	spi@c1108d80 {

		compatible = "amlogic,meson-gx-spicc";

		reg = <0xc1108d80 0x80>;

		interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;

		clock-names = "core";

		clocks = <&clk81>;

		#address-cells = <1>;

		#size-cells = <0>;

	};

Required properties:

- compatible: should be one of the following.

    - mediatek,mt2701-spi: for mt2701 platforms

    - mediatek,mt2712-spi: for mt2712 platforms

    - mediatek,mt6589-spi: for mt6589 platforms

    - mediatek,mt7622-spi: for mt7622 platforms

    - mediatek,mt8135-spi: for mt8135 platforms

    - mediatek,mt8173-spi: for mt8173 platforms

STMicroelectronics STM32 SPI Controller

The STM32 SPI controller is used to communicate with external devices using

the Serial Peripheral Interface. It supports full-duplex, half-duplex and

simplex synchronous serial communication with external devices. It supports

from 4 to 32-bit data size. Although it can be configured as master or slave,

only master is supported by the driver.

Required properties:

- compatible: Must be "st,stm32h7-spi".

- reg: Offset and length of the device's register set.

- interrupts: Must contain the interrupt id.

- clocks: Must contain an entry for spiclk (which feeds the internal clock

	  generator).

- #address-cells:  Number of cells required to define a chip select address.

- #size-cells: Should be zero.

Optional properties:

- resets: Must contain the phandle to the reset controller.

- A pinctrl state named "default" may be defined to set pins in mode of

  operation for SPI transfer.

- dmas: DMA specifiers for tx and rx dma. DMA fifo mode must be used. See the

  STM32 DMA bindings, Documentation/devicetree/bindings/dma/stm32-dma.txt.

- dma-names: DMA request names should include "tx" and "rx" if present.

- cs-gpios: list of GPIO chip selects. See the SPI bus bindings,

  Documentation/devicetree/bindings/spi/spi-bus.txt

Child nodes represent devices on the SPI bus

  See ../spi/spi-bus.txt

Optional properties:

- st,spi-midi-ns: (Master Inter-Data Idleness) minimum time delay in

		  nanoseconds inserted between two consecutive data frames.

Example:

	spi2: spi@40003800 {

		#address-cells = <1>;

		#size-cells = <0>;

		compatible = "st,stm32h7-spi";

		reg = <0x40003800 0x400>;

		interrupts = <36>;

		clocks = <&rcc SPI2_CK>;

		resets = <&rcc 1166>;

		dmas = <&dmamux1 0 39 0x400 0x01>,

		       <&dmamux1 1 40 0x400 0x01>;

		dma-names = "rx", "tx";

		pinctrl-0 = <&spi2_pins_b>;

		pinctrl-names = "default";

		cs-gpios = <&gpioa 11 0>;

		aardvark@0 {

			compatible = "totalphase,aardvark";

			reg = <0>;

			spi-max-frequency = <4000000>;

			st,spi-midi-ns = <4000>;

		};

	};