Loading drivers/cam_cdm/cam_cdm_util.c +31 −0 Original line number Diff line number Diff line Loading @@ -168,6 +168,15 @@ struct cdm_wait_comp_event_cmd { unsigned int mask2; } __attribute__((__packed__)); struct cdm_clear_comp_event_cmd { unsigned int reserved : 8; unsigned int id : 8; unsigned int id_reserved: 8; unsigned int cmd : 8; unsigned int mask1; unsigned int mask2; } __attribute__((__packed__)); struct cdm_prefetch_disable_event_cmd { unsigned int reserved : 8; unsigned int id : 8; Loading Loading @@ -223,6 +232,11 @@ uint32_t cdm_required_size_comp_wait(void) return cdm_get_cmd_header_size(CAM_CDM_COMP_WAIT); } uint32_t cdm_required_size_clear_comp_event(void) { return cdm_get_cmd_header_size(CAM_CDM_CLEAR_COMP_WAIT); } uint32_t cdm_required_size_prefetch_disable(void) { return cdm_get_cmd_header_size(CAM_CDM_WAIT_PREFETCH_DISABLE); Loading Loading @@ -382,6 +396,21 @@ uint32_t *cdm_write_wait_comp_event( return pCmdBuffer; } uint32_t *cdm_write_clear_comp_event( uint32_t *pCmdBuffer, uint32_t mask1, uint32_t mask2) { struct cdm_clear_comp_event_cmd *pHeader = (struct cdm_clear_comp_event_cmd *)pCmdBuffer; pHeader->cmd = CAM_CDM_CLEAR_COMP_WAIT; pHeader->mask1 = mask1; pHeader->mask2 = mask2; pCmdBuffer += cdm_get_cmd_header_size(CAM_CDM_CLEAR_COMP_WAIT); return pCmdBuffer; } uint32_t *cdm_write_wait_prefetch_disable( uint32_t *pCmdBuffer, uint32_t id, Loading Loading @@ -412,6 +441,7 @@ struct cam_cdm_utils_ops CDM170_ops = { cdm_required_size_wait_event, cdm_required_size_changebase, cdm_required_size_comp_wait, cdm_required_size_clear_comp_event, cdm_required_size_prefetch_disable, cdm_offsetof_dmi_addr, cdm_offsetof_indirect_addr, Loading @@ -423,6 +453,7 @@ struct cam_cdm_utils_ops CDM170_ops = { cdm_write_wait_event, cdm_write_changebase, cdm_write_wait_comp_event, cdm_write_clear_comp_event, cdm_write_wait_prefetch_disable, }; Loading drivers/cam_cdm/cam_cdm_util.h +15 −0 Original line number Diff line number Diff line Loading @@ -63,6 +63,10 @@ enum cam_cdm_command { * in dwords. * @return Size in dwords * * @cdm_required_size_clear_comp_event: Calculates the size of clear-comp-event * command in dwords. * @return Size in dwords * * @cdm_required_size_changebase: Calculates the size of a change-base command * in dwords. * @return Size in dwords Loading Loading @@ -121,6 +125,12 @@ enum cam_cdm_command { * @pCmdBuffer: Pointer to command buffer * @mask1: This value decides which comp events to wait (0 - 31). * @mask2: This value decides which comp events to wait (32 - 65). * * @cdm_write_clear_comp_event: Writes a clear comp event cmd into the * command buffer. * @pCmdBuffer: Pointer to command buffer * @mask1: This value decides which comp events to clear (0 - 31). * @mask2: This value decides which comp events to clear (32 - 65). */ struct cam_cdm_utils_ops { uint32_t (*cdm_get_cmd_header_size)(unsigned int command); Loading @@ -132,6 +142,7 @@ uint32_t (*cdm_required_size_genirq)(void); uint32_t (*cdm_required_size_wait_event)(void); uint32_t (*cdm_required_size_changebase)(void); uint32_t (*cdm_required_size_comp_wait)(void); uint32_t (*cdm_required_size_clear_comp_event)(void); uint32_t (*cdm_required_size_prefetch_disable)(void); uint32_t (*cdm_offsetof_dmi_addr)(void); uint32_t (*cdm_offsetof_indirect_addr)(void); Loading Loading @@ -174,6 +185,10 @@ uint32_t *(*cdm_write_wait_comp_event)( uint32_t *pCmdBuffer, uint32_t mask1, uint32_t mask2); uint32_t *(*cdm_write_clear_comp_event)( uint32_t *pCmdBuffer, uint32_t mask1, uint32_t mask2); uint32_t *(*cdm_write_wait_prefetch_disable)( uint32_t *pCmdBuffer, uint32_t id, Loading drivers/cam_ope/ope_hw_mgr/ope_hw/ope_core.c +7 −0 Original line number Diff line number Diff line Loading @@ -1184,6 +1184,9 @@ static int cam_ope_dev_create_kmd_buf_nrt(struct cam_ope_hw_mgr *hw_mgr, cdm_ops = ctx_data->ope_cdm.cdm_ops; kmd_buf = cdm_ops->cdm_write_clear_comp_event(kmd_buf, OPE_WAIT_COMP_IDLE|OPE_WAIT_COMP_RUP, 0x0); /* Frame 0 DB */ kmd_buf = ope_create_frame_cmd(hw_mgr, ctx_data, req_idx, Loading Loading @@ -1266,6 +1269,8 @@ static int cam_ope_dev_create_kmd_buf_batch(struct cam_ope_hw_mgr *hw_mgr, (kmd_buf_offset / sizeof(len)); cdm_kmd_start_addr = kmd_buf; cdm_ops = ctx_data->ope_cdm.cdm_ops; kmd_buf = cdm_ops->cdm_write_clear_comp_event(kmd_buf, OPE_WAIT_COMP_IDLE|OPE_WAIT_COMP_RUP, 0x0); for (i = 0; i < frm_proc->batch_size; i++) { wr_cdm_info = Loading Loading @@ -1393,6 +1398,8 @@ static int cam_ope_dev_create_kmd_buf(struct cam_ope_hw_mgr *hw_mgr, CAM_DBG(CAM_OPE, "kmd_buf:%x req_idx:%d req_id:%lld offset:%d", kmd_buf, req_idx, ope_request->request_id, kmd_buf_offset); kmd_buf = cdm_ops->cdm_write_clear_comp_event(kmd_buf, OPE_WAIT_COMP_IDLE|OPE_WAIT_COMP_RUP, 0x0); /* Frame 0 DB */ kmd_buf = ope_create_frame_cmd(hw_mgr, ctx_data, req_idx, Loading Loading
drivers/cam_cdm/cam_cdm_util.c +31 −0 Original line number Diff line number Diff line Loading @@ -168,6 +168,15 @@ struct cdm_wait_comp_event_cmd { unsigned int mask2; } __attribute__((__packed__)); struct cdm_clear_comp_event_cmd { unsigned int reserved : 8; unsigned int id : 8; unsigned int id_reserved: 8; unsigned int cmd : 8; unsigned int mask1; unsigned int mask2; } __attribute__((__packed__)); struct cdm_prefetch_disable_event_cmd { unsigned int reserved : 8; unsigned int id : 8; Loading Loading @@ -223,6 +232,11 @@ uint32_t cdm_required_size_comp_wait(void) return cdm_get_cmd_header_size(CAM_CDM_COMP_WAIT); } uint32_t cdm_required_size_clear_comp_event(void) { return cdm_get_cmd_header_size(CAM_CDM_CLEAR_COMP_WAIT); } uint32_t cdm_required_size_prefetch_disable(void) { return cdm_get_cmd_header_size(CAM_CDM_WAIT_PREFETCH_DISABLE); Loading Loading @@ -382,6 +396,21 @@ uint32_t *cdm_write_wait_comp_event( return pCmdBuffer; } uint32_t *cdm_write_clear_comp_event( uint32_t *pCmdBuffer, uint32_t mask1, uint32_t mask2) { struct cdm_clear_comp_event_cmd *pHeader = (struct cdm_clear_comp_event_cmd *)pCmdBuffer; pHeader->cmd = CAM_CDM_CLEAR_COMP_WAIT; pHeader->mask1 = mask1; pHeader->mask2 = mask2; pCmdBuffer += cdm_get_cmd_header_size(CAM_CDM_CLEAR_COMP_WAIT); return pCmdBuffer; } uint32_t *cdm_write_wait_prefetch_disable( uint32_t *pCmdBuffer, uint32_t id, Loading Loading @@ -412,6 +441,7 @@ struct cam_cdm_utils_ops CDM170_ops = { cdm_required_size_wait_event, cdm_required_size_changebase, cdm_required_size_comp_wait, cdm_required_size_clear_comp_event, cdm_required_size_prefetch_disable, cdm_offsetof_dmi_addr, cdm_offsetof_indirect_addr, Loading @@ -423,6 +453,7 @@ struct cam_cdm_utils_ops CDM170_ops = { cdm_write_wait_event, cdm_write_changebase, cdm_write_wait_comp_event, cdm_write_clear_comp_event, cdm_write_wait_prefetch_disable, }; Loading
drivers/cam_cdm/cam_cdm_util.h +15 −0 Original line number Diff line number Diff line Loading @@ -63,6 +63,10 @@ enum cam_cdm_command { * in dwords. * @return Size in dwords * * @cdm_required_size_clear_comp_event: Calculates the size of clear-comp-event * command in dwords. * @return Size in dwords * * @cdm_required_size_changebase: Calculates the size of a change-base command * in dwords. * @return Size in dwords Loading Loading @@ -121,6 +125,12 @@ enum cam_cdm_command { * @pCmdBuffer: Pointer to command buffer * @mask1: This value decides which comp events to wait (0 - 31). * @mask2: This value decides which comp events to wait (32 - 65). * * @cdm_write_clear_comp_event: Writes a clear comp event cmd into the * command buffer. * @pCmdBuffer: Pointer to command buffer * @mask1: This value decides which comp events to clear (0 - 31). * @mask2: This value decides which comp events to clear (32 - 65). */ struct cam_cdm_utils_ops { uint32_t (*cdm_get_cmd_header_size)(unsigned int command); Loading @@ -132,6 +142,7 @@ uint32_t (*cdm_required_size_genirq)(void); uint32_t (*cdm_required_size_wait_event)(void); uint32_t (*cdm_required_size_changebase)(void); uint32_t (*cdm_required_size_comp_wait)(void); uint32_t (*cdm_required_size_clear_comp_event)(void); uint32_t (*cdm_required_size_prefetch_disable)(void); uint32_t (*cdm_offsetof_dmi_addr)(void); uint32_t (*cdm_offsetof_indirect_addr)(void); Loading Loading @@ -174,6 +185,10 @@ uint32_t *(*cdm_write_wait_comp_event)( uint32_t *pCmdBuffer, uint32_t mask1, uint32_t mask2); uint32_t *(*cdm_write_clear_comp_event)( uint32_t *pCmdBuffer, uint32_t mask1, uint32_t mask2); uint32_t *(*cdm_write_wait_prefetch_disable)( uint32_t *pCmdBuffer, uint32_t id, Loading
drivers/cam_ope/ope_hw_mgr/ope_hw/ope_core.c +7 −0 Original line number Diff line number Diff line Loading @@ -1184,6 +1184,9 @@ static int cam_ope_dev_create_kmd_buf_nrt(struct cam_ope_hw_mgr *hw_mgr, cdm_ops = ctx_data->ope_cdm.cdm_ops; kmd_buf = cdm_ops->cdm_write_clear_comp_event(kmd_buf, OPE_WAIT_COMP_IDLE|OPE_WAIT_COMP_RUP, 0x0); /* Frame 0 DB */ kmd_buf = ope_create_frame_cmd(hw_mgr, ctx_data, req_idx, Loading Loading @@ -1266,6 +1269,8 @@ static int cam_ope_dev_create_kmd_buf_batch(struct cam_ope_hw_mgr *hw_mgr, (kmd_buf_offset / sizeof(len)); cdm_kmd_start_addr = kmd_buf; cdm_ops = ctx_data->ope_cdm.cdm_ops; kmd_buf = cdm_ops->cdm_write_clear_comp_event(kmd_buf, OPE_WAIT_COMP_IDLE|OPE_WAIT_COMP_RUP, 0x0); for (i = 0; i < frm_proc->batch_size; i++) { wr_cdm_info = Loading Loading @@ -1393,6 +1398,8 @@ static int cam_ope_dev_create_kmd_buf(struct cam_ope_hw_mgr *hw_mgr, CAM_DBG(CAM_OPE, "kmd_buf:%x req_idx:%d req_id:%lld offset:%d", kmd_buf, req_idx, ope_request->request_id, kmd_buf_offset); kmd_buf = cdm_ops->cdm_write_clear_comp_event(kmd_buf, OPE_WAIT_COMP_IDLE|OPE_WAIT_COMP_RUP, 0x0); /* Frame 0 DB */ kmd_buf = ope_create_frame_cmd(hw_mgr, ctx_data, req_idx, Loading