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Commit b2fd8ca9 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
Browse files

Merge "clk: qcom: camcc: Enable safe config and HW_CTL for all RCGs"

parents 29c5c34f a6eb7133

drivers/clk/qcom/camcc-kona.c

+54 −0
Original line number Diff line number Diff line
@@ -526,6 +526,7 @@ static struct clk_rcg2 cam_cc_bps_clk_src = { 
	.parent_map = cam_cc_parent_map_0,

	.freq_tbl = ftbl_cam_cc_bps_clk_src,

	.enable_safe_config = true,

	.flags = HW_CLK_CTRL_MODE,

	.clkr.hw.init = &(struct clk_init_data){

		.name = "cam_cc_bps_clk_src",

		.parent_names = cam_cc_parent_names_0,
@@ -556,6 +557,7 @@ static struct clk_rcg2 cam_cc_camnoc_axi_clk_src = { 
	.parent_map = cam_cc_parent_map_0,

	.freq_tbl = ftbl_cam_cc_camnoc_axi_clk_src,

	.enable_safe_config = true,

	.flags = HW_CLK_CTRL_MODE,

	.clkr.hw.init = &(struct clk_init_data){

		.name = "cam_cc_camnoc_axi_clk_src",

		.parent_names = cam_cc_parent_names_0,
@@ -582,6 +584,8 @@ static struct clk_rcg2 cam_cc_cci_0_clk_src = { 
	.hid_width = 5,

	.parent_map = cam_cc_parent_map_0,

	.freq_tbl = ftbl_cam_cc_cci_0_clk_src,

	.enable_safe_config = true,

	.flags = HW_CLK_CTRL_MODE,

	.clkr.hw.init = &(struct clk_init_data){

		.name = "cam_cc_cci_0_clk_src",

		.parent_names = cam_cc_parent_names_0,
@@ -601,6 +605,8 @@ static struct clk_rcg2 cam_cc_cci_1_clk_src = { 
	.hid_width = 5,

	.parent_map = cam_cc_parent_map_0,

	.freq_tbl = ftbl_cam_cc_cci_0_clk_src,

	.enable_safe_config = true,

	.flags = HW_CLK_CTRL_MODE,

	.clkr.hw.init = &(struct clk_init_data){

		.name = "cam_cc_cci_1_clk_src",

		.parent_names = cam_cc_parent_names_0,
@@ -626,6 +632,8 @@ static struct clk_rcg2 cam_cc_cphy_rx_clk_src = { 
	.hid_width = 5,

	.parent_map = cam_cc_parent_map_0,

	.freq_tbl = ftbl_cam_cc_cphy_rx_clk_src,

	.enable_safe_config = true,

	.flags = HW_CLK_CTRL_MODE,

	.clkr.hw.init = &(struct clk_init_data){

		.name = "cam_cc_cphy_rx_clk_src",

		.parent_names = cam_cc_parent_names_0,
@@ -651,6 +659,8 @@ static struct clk_rcg2 cam_cc_csi0phytimer_clk_src = { 
	.hid_width = 5,

	.parent_map = cam_cc_parent_map_0,

	.freq_tbl = ftbl_cam_cc_csi0phytimer_clk_src,

	.enable_safe_config = true,

	.flags = HW_CLK_CTRL_MODE,

	.clkr.hw.init = &(struct clk_init_data){

		.name = "cam_cc_csi0phytimer_clk_src",

		.parent_names = cam_cc_parent_names_0,
@@ -670,6 +680,8 @@ static struct clk_rcg2 cam_cc_csi1phytimer_clk_src = { 
	.hid_width = 5,

	.parent_map = cam_cc_parent_map_0,

	.freq_tbl = ftbl_cam_cc_csi0phytimer_clk_src,

	.enable_safe_config = true,

	.flags = HW_CLK_CTRL_MODE,

	.clkr.hw.init = &(struct clk_init_data){

		.name = "cam_cc_csi1phytimer_clk_src",

		.parent_names = cam_cc_parent_names_0,
@@ -689,6 +701,8 @@ static struct clk_rcg2 cam_cc_csi2phytimer_clk_src = { 
	.hid_width = 5,

	.parent_map = cam_cc_parent_map_0,

	.freq_tbl = ftbl_cam_cc_csi0phytimer_clk_src,

	.enable_safe_config = true,

	.flags = HW_CLK_CTRL_MODE,

	.clkr.hw.init = &(struct clk_init_data){

		.name = "cam_cc_csi2phytimer_clk_src",

		.parent_names = cam_cc_parent_names_0,
@@ -708,6 +722,8 @@ static struct clk_rcg2 cam_cc_csi3phytimer_clk_src = { 
	.hid_width = 5,

	.parent_map = cam_cc_parent_map_0,

	.freq_tbl = ftbl_cam_cc_csi0phytimer_clk_src,

	.enable_safe_config = true,

	.flags = HW_CLK_CTRL_MODE,

	.clkr.hw.init = &(struct clk_init_data){

		.name = "cam_cc_csi3phytimer_clk_src",

		.parent_names = cam_cc_parent_names_0,
@@ -727,6 +743,8 @@ static struct clk_rcg2 cam_cc_csi4phytimer_clk_src = { 
	.hid_width = 5,

	.parent_map = cam_cc_parent_map_0,

	.freq_tbl = ftbl_cam_cc_csi0phytimer_clk_src,

	.enable_safe_config = true,

	.flags = HW_CLK_CTRL_MODE,

	.clkr.hw.init = &(struct clk_init_data){

		.name = "cam_cc_csi4phytimer_clk_src",

		.parent_names = cam_cc_parent_names_0,
@@ -746,6 +764,8 @@ static struct clk_rcg2 cam_cc_csi5phytimer_clk_src = { 
	.hid_width = 5,

	.parent_map = cam_cc_parent_map_0,

	.freq_tbl = ftbl_cam_cc_csi0phytimer_clk_src,

	.enable_safe_config = true,

	.flags = HW_CLK_CTRL_MODE,

	.clkr.hw.init = &(struct clk_init_data){

		.name = "cam_cc_csi5phytimer_clk_src",

		.parent_names = cam_cc_parent_names_0,
@@ -775,6 +795,8 @@ static struct clk_rcg2 cam_cc_fast_ahb_clk_src = { 
	.hid_width = 5,

	.parent_map = cam_cc_parent_map_0,

	.freq_tbl = ftbl_cam_cc_fast_ahb_clk_src,

	.enable_safe_config = true,

	.flags = HW_CLK_CTRL_MODE,

	.clkr.hw.init = &(struct clk_init_data){

		.name = "cam_cc_fast_ahb_clk_src",

		.parent_names = cam_cc_parent_names_0,
@@ -814,6 +836,7 @@ static struct clk_rcg2 cam_cc_fd_core_clk_src = { 
	.parent_map = cam_cc_parent_map_0,

	.freq_tbl = ftbl_cam_cc_fd_core_clk_src,

	.enable_safe_config = true,

	.flags = HW_CLK_CTRL_MODE,

	.clkr.hw.init = &(struct clk_init_data){

		.name = "cam_cc_fd_core_clk_src",

		.parent_names = cam_cc_parent_names_0,
@@ -836,6 +859,7 @@ static struct clk_rcg2 cam_cc_icp_clk_src = { 
	.parent_map = cam_cc_parent_map_0,

	.freq_tbl = ftbl_cam_cc_fd_core_clk_src,

	.enable_safe_config = true,

	.flags = HW_CLK_CTRL_MODE,

	.clkr.hw.init = &(struct clk_init_data){

		.name = "cam_cc_icp_clk_src",

		.parent_names = cam_cc_parent_names_0,
@@ -876,6 +900,7 @@ static struct clk_rcg2 cam_cc_ife_0_clk_src = { 
	.parent_map = cam_cc_parent_map_2,

	.freq_tbl = ftbl_cam_cc_ife_0_clk_src,

	.enable_safe_config = true,

	.flags = HW_CLK_CTRL_MODE,

	.clkr.hw.init = &(struct clk_init_data){

		.name = "cam_cc_ife_0_clk_src",

		.parent_names = cam_cc_parent_names_2,
@@ -906,6 +931,7 @@ static struct clk_rcg2 cam_cc_ife_0_csid_clk_src = { 
	.parent_map = cam_cc_parent_map_0,

	.freq_tbl = ftbl_cam_cc_ife_0_csid_clk_src,

	.enable_safe_config = true,

	.flags = HW_CLK_CTRL_MODE,

	.clkr.hw.init = &(struct clk_init_data){

		.name = "cam_cc_ife_0_csid_clk_src",

		.parent_names = cam_cc_parent_names_0,
@@ -944,6 +970,7 @@ static struct clk_rcg2 cam_cc_ife_1_clk_src = { 
	.parent_map = cam_cc_parent_map_3,

	.freq_tbl = ftbl_cam_cc_ife_1_clk_src,

	.enable_safe_config = true,

	.flags = HW_CLK_CTRL_MODE,

	.clkr.hw.init = &(struct clk_init_data){

		.name = "cam_cc_ife_1_clk_src",

		.parent_names = cam_cc_parent_names_3,
@@ -967,6 +994,7 @@ static struct clk_rcg2 cam_cc_ife_1_csid_clk_src = { 
	.parent_map = cam_cc_parent_map_0,

	.freq_tbl = ftbl_cam_cc_ife_0_csid_clk_src,

	.enable_safe_config = true,

	.flags = HW_CLK_CTRL_MODE,

	.clkr.hw.init = &(struct clk_init_data){

		.name = "cam_cc_ife_1_csid_clk_src",

		.parent_names = cam_cc_parent_names_0,
@@ -1000,6 +1028,8 @@ static struct clk_rcg2 cam_cc_ife_lite_clk_src = { 
	.hid_width = 5,

	.parent_map = cam_cc_parent_map_0,

	.freq_tbl = ftbl_cam_cc_ife_lite_clk_src,

	.enable_safe_config = true,

	.flags = HW_CLK_CTRL_MODE,

	.clkr.hw.init = &(struct clk_init_data){

		.name = "cam_cc_ife_lite_clk_src",

		.parent_names = cam_cc_parent_names_0,
@@ -1021,6 +1051,7 @@ static struct clk_rcg2 cam_cc_ife_lite_csid_clk_src = { 
	.parent_map = cam_cc_parent_map_0,

	.freq_tbl = ftbl_cam_cc_cphy_rx_clk_src,

	.enable_safe_config = true,

	.flags = HW_CLK_CTRL_MODE,

	.clkr.hw.init = &(struct clk_init_data){

		.name = "cam_cc_ife_lite_csid_clk_src",

		.parent_names = cam_cc_parent_names_0,
@@ -1050,6 +1081,7 @@ static struct clk_rcg2 cam_cc_ipe_0_clk_src = { 
	.parent_map = cam_cc_parent_map_4,

	.freq_tbl = ftbl_cam_cc_ipe_0_clk_src,

	.enable_safe_config = true,

	.flags = HW_CLK_CTRL_MODE,

	.clkr.hw.init = &(struct clk_init_data){

		.name = "cam_cc_ipe_0_clk_src",

		.parent_names = cam_cc_parent_names_4,
@@ -1073,6 +1105,7 @@ static struct clk_rcg2 cam_cc_jpeg_clk_src = { 
	.parent_map = cam_cc_parent_map_0,

	.freq_tbl = ftbl_cam_cc_bps_clk_src,

	.enable_safe_config = true,

	.flags = HW_CLK_CTRL_MODE,

	.clkr.hw.init = &(struct clk_init_data){

		.name = "cam_cc_jpeg_clk_src",

		.parent_names = cam_cc_parent_names_0,
@@ -1109,6 +1142,8 @@ static struct clk_rcg2 cam_cc_mclk0_clk_src = { 
	.hid_width = 5,

	.parent_map = cam_cc_parent_map_1,

	.freq_tbl = ftbl_cam_cc_mclk0_clk_src,

	.enable_safe_config = true,

	.flags = HW_CLK_CTRL_MODE,

	.clkr.hw.init = &(struct clk_init_data){

		.name = "cam_cc_mclk0_clk_src",

		.parent_names = cam_cc_parent_names_1,
@@ -1128,6 +1163,8 @@ static struct clk_rcg2 cam_cc_mclk1_clk_src = { 
	.hid_width = 5,

	.parent_map = cam_cc_parent_map_1,

	.freq_tbl = ftbl_cam_cc_mclk0_clk_src,

	.enable_safe_config = true,

	.flags = HW_CLK_CTRL_MODE,

	.clkr.hw.init = &(struct clk_init_data){

		.name = "cam_cc_mclk1_clk_src",

		.parent_names = cam_cc_parent_names_1,
@@ -1147,6 +1184,8 @@ static struct clk_rcg2 cam_cc_mclk2_clk_src = { 
	.hid_width = 5,

	.parent_map = cam_cc_parent_map_1,

	.freq_tbl = ftbl_cam_cc_mclk0_clk_src,

	.enable_safe_config = true,

	.flags = HW_CLK_CTRL_MODE,

	.clkr.hw.init = &(struct clk_init_data){

		.name = "cam_cc_mclk2_clk_src",

		.parent_names = cam_cc_parent_names_1,
@@ -1166,6 +1205,8 @@ static struct clk_rcg2 cam_cc_mclk3_clk_src = { 
	.hid_width = 5,

	.parent_map = cam_cc_parent_map_1,

	.freq_tbl = ftbl_cam_cc_mclk0_clk_src,

	.enable_safe_config = true,

	.flags = HW_CLK_CTRL_MODE,

	.clkr.hw.init = &(struct clk_init_data){

		.name = "cam_cc_mclk3_clk_src",

		.parent_names = cam_cc_parent_names_1,
@@ -1185,6 +1226,8 @@ static struct clk_rcg2 cam_cc_mclk4_clk_src = { 
	.hid_width = 5,

	.parent_map = cam_cc_parent_map_1,

	.freq_tbl = ftbl_cam_cc_mclk0_clk_src,

	.enable_safe_config = true,

	.flags = HW_CLK_CTRL_MODE,

	.clkr.hw.init = &(struct clk_init_data){

		.name = "cam_cc_mclk4_clk_src",

		.parent_names = cam_cc_parent_names_1,
@@ -1204,6 +1247,8 @@ static struct clk_rcg2 cam_cc_mclk5_clk_src = { 
	.hid_width = 5,

	.parent_map = cam_cc_parent_map_1,

	.freq_tbl = ftbl_cam_cc_mclk0_clk_src,

	.enable_safe_config = true,

	.flags = HW_CLK_CTRL_MODE,

	.clkr.hw.init = &(struct clk_init_data){

		.name = "cam_cc_mclk5_clk_src",

		.parent_names = cam_cc_parent_names_1,
@@ -1223,6 +1268,8 @@ static struct clk_rcg2 cam_cc_mclk6_clk_src = { 
	.hid_width = 5,

	.parent_map = cam_cc_parent_map_1,

	.freq_tbl = ftbl_cam_cc_mclk0_clk_src,

	.enable_safe_config = true,

	.flags = HW_CLK_CTRL_MODE,

	.clkr.hw.init = &(struct clk_init_data){

		.name = "cam_cc_mclk6_clk_src",

		.parent_names = cam_cc_parent_names_1,
@@ -1242,6 +1289,8 @@ static struct clk_rcg2 cam_cc_sbi_csid_clk_src = { 
	.hid_width = 5,

	.parent_map = cam_cc_parent_map_0,

	.freq_tbl = ftbl_cam_cc_cphy_rx_clk_src,

	.enable_safe_config = true,

	.flags = HW_CLK_CTRL_MODE,

	.clkr.hw.init = &(struct clk_init_data){

		.name = "cam_cc_sbi_csid_clk_src",

		.parent_names = cam_cc_parent_names_0,
@@ -1266,6 +1315,8 @@ static struct clk_rcg2 cam_cc_sleep_clk_src = { 
	.hid_width = 5,

	.parent_map = cam_cc_parent_map_5,

	.freq_tbl = ftbl_cam_cc_sleep_clk_src,

	.enable_safe_config = true,

	.flags = HW_CLK_CTRL_MODE,

	.clkr.hw.init = &(struct clk_init_data){

		.name = "cam_cc_sleep_clk_src",

		.parent_names = cam_cc_parent_names_5,
@@ -1292,6 +1343,7 @@ static struct clk_rcg2 cam_cc_slow_ahb_clk_src = { 
	.parent_map = cam_cc_parent_map_0,

	.freq_tbl = ftbl_cam_cc_slow_ahb_clk_src,

	.enable_safe_config = true,

	.flags = HW_CLK_CTRL_MODE,

	.clkr.hw.init = &(struct clk_init_data){

		.name = "cam_cc_slow_ahb_clk_src",

		.parent_names = cam_cc_parent_names_0,
@@ -1316,6 +1368,8 @@ static struct clk_rcg2 cam_cc_xo_clk_src = { 
	.hid_width = 5,

	.parent_map = cam_cc_parent_map_6,

	.freq_tbl = ftbl_cam_cc_xo_clk_src,

	.enable_safe_config = true,

	.flags = HW_CLK_CTRL_MODE,

	.clkr.hw.init = &(struct clk_init_data){

		.name = "cam_cc_xo_clk_src",

		.parent_names = cam_cc_parent_names_6_ao,