Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit b2b427f5 authored by Ram Prakash Gupta's avatar Ram Prakash Gupta
Browse files

mmc: cqhci: Clear interrupt after err handling



Clear interrupt after error handling in cqe. And also dump
cqhci register in case of cqe error.

Change-Id: I8bf1956f18de5e7d5b0a2cfe97983dc6f58c12b5
Signed-off-by: default avatarRam Prakash Gupta <rampraka@codeaurora.org>
parent 64a4807b
Loading
Loading
Loading
Loading
+9 −2
Original line number Diff line number Diff line
@@ -901,14 +901,21 @@ irqreturn_t cqhci_irq(struct mmc_host *mmc, u32 intmask, int cmd_error,
	struct cqhci_host *cq_host = mmc->cqe_private;

	status = cqhci_readl(cq_host, CQHCI_IS);
	cqhci_writel(cq_host, status, CQHCI_IS);

	pr_debug("%s: cqhci: IRQ status: 0x%08x\n", mmc_hostname(mmc), status);
	mmc_log_string(mmc, "CQIS: 0x%x cmd_error : %d data_err: %d\n",
		status, cmd_error, data_error);

	if ((status & CQHCI_IS_RED) || cmd_error || data_error)
	if ((status & CQHCI_IS_RED) || cmd_error || data_error) {
		pr_err("%s: cqhci: error IRQ status: 0x%08x cmd error %d data error %d\n",
			mmc_hostname(mmc), status, cmd_error, data_error);
		cqhci_dumpregs(cq_host);
		cqhci_writel(cq_host, status, CQHCI_IS);
		cqhci_error_irq(mmc, status, cmd_error, data_error);
	} else {
		/* Clear interrupt */
		cqhci_writel(cq_host, status, CQHCI_IS);
	}

	if (status & CQHCI_IS_TCC) {
		/* read TCN and complete the request */